riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-07-22	target/mips: Add 'fall through' comments for handling nanoMips' SHXS, SWXS	Aleksandar Markovic	1	-0/+2
2019-07-15	target/mips: Add missing 'break' for certain cases of MTTR handling	Aleksandar Markovic	1	-0/+2
2019-07-15	target/mips: Add missing 'break' for certain cases of MFTR handling	Aleksandar Markovic	1	-0/+2
2019-07-15	target/mips: Add missing 'break' for a case of MTHC0 handling	Aleksandar Markovic	1	-0/+1
2019-07-02	target/mips: Correct comments in translate.c	Aleksandar Markovic	1	-183/+314
2019-06-21	target/mips: Fix if-else-switch-case arms checkpatch errors in translate.c	Aleksandar Markovic	1	-72/+133
2019-06-21	target/mips: Fix some space checkpatch errors in translate.c	Aleksandar Markovic	1	-118/+122
2019-06-10	target/mips: Use env_cpu, env_archcpu	Richard Henderson	1	-2/+1
2019-06-01	target/mips: Add emulation of MMI instruction PCPYUD	Mateja Marjanovic	1	-1/+42
2019-06-01	target/mips: Add emulation of MMI instruction PCPYLD	Mateja Marjanovic	1	-1/+42
2019-06-01	target/mips: Add emulation of MMI instruction PCPYH	Mateja Marjanovic	1	-1/+65
2019-05-28	Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-next-280519-2...	Peter Maydell	1	-1/+9
2019-05-28	target/mips: only build mips-semi for softmmu	Alex Bennée	1	-0/+8
2019-05-28	semihosting: move semihosting configuration into its own directory	Alex Bennée	1	-1/+1
2019-05-26	target/mips: Refactor and fix INSERT.<B\|H\|W\|D> instructions	Mateja Marjanovic	1	-1/+18
2019-05-26	target/mips: Refactor and fix COPY_U.<B\|H\|W> instructions	Mateja Marjanovic	1	-1/+20
2019-05-26	target/mips: Refactor and fix COPY_S.<B\|H\|W\|D> instructions	Mateja Marjanovic	1	-1/+18
2019-04-24	tcg: Hoist max_insns computation to tb_gen_code	Richard Henderson	1	-2/+2
2019-04-18	qom/cpu: Simplify how CPUClass:cpu_dump_state() prints	Markus Armbruster	1	-40/+40
2019-04-18	target: Simplify how the TARGET_cpu_list() print	Markus Armbruster	1	-0/+1
2019-02-27	target/mips: Preparing for adding MMI instructions	Mateja Marjanovic	1	-2/+41
2019-02-14	target/mips: reimplement SC instruction emulation and use cmpxchg	Leon Alrae	1	-81/+42
2019-02-14	target/mips: compare virtual addresses in LL/SC sequence	Leon Alrae	1	-2/+2
2019-01-24	target/mips: nanoMIPS: Fix branch handling	Stefan Markovic	1	-0/+12
2019-01-24	target/mips: Extend gen_scwp() functionality to support EVA	Aleksandar Markovic	1	-4/+6
2019-01-24	target/mips: Correct the second argument type of cpu_supports_isa()	Aleksandar Markovic	1	-1/+1
2019-01-24	target/mips: nanoMIPS: Rename macros for extracting 3-bit-coded GPR numbers	Aleksandar Markovic	1	-13/+13
2019-01-24	target/mips: nanoMIPS: Remove an unused macro	Aleksandar Markovic	1	-1/+0
2019-01-24	target/mips: nanoMIPS: Remove duplicate macro definitions	Aleksandar Markovic	1	-10/+0
2019-01-18	target/mips: Introduce 32 R5900 multimedia registers	Fredrik Noring	1	-0/+16
2019-01-18	target/mips: Rename 'rn' to 'register_name'	Aleksandar Markovic	1	-426/+432
2019-01-18	target/mips: Amend preprocessor constants for CP0 registers	Aleksandar Markovic	1	-138/+138
2019-01-18	target/mips: Provide R/W access to SAARI and SAAR CP0 registers	Yongbok Kim	1	-4/+62
2019-01-18	target/mips: Use preprocessor constants for 32 major CP0 registers	Aleksandar Markovic	1	-136/+136
2019-01-11	avoid TABs in files that only contain a few	Paolo Bonzini	1	-1/+1
2019-01-03	target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions	Fredrik Noring	1	-3/+9
2019-01-03	target/mips: Support R5900 three-operand MADD and MADDU instructions	Philippe Mathieu-Daudé	1	-5/+53
2019-01-03	target/mips: MXU: Add handler for an align instruction	Aleksandar Markovic	1	-3/+194
2019-01-03	target/mips: MXU: Add handlers for max/min instructions	Aleksandar Markovic	1	-21/+279
2019-01-03	target/mips: MXU: Add handlers for logic instructions	Aleksandar Markovic	1	-34/+205
2019-01-03	target/mips: MXU: Improve the comment containing MXU overview	Aleksandar Markovic	1	-30/+44
2019-01-03	target/mips: MXU: Add generic naming for optn2 constants	Aleksandar Markovic	1	-0/+5
2019-01-03	target/mips: MXU: Add missing opcodes/decoding for LX* instructions	Aleksandar Markovic	1	-38/+102
2018-11-17	target/mips: Rename MMI-related functions	Aleksandar Markovic	1	-16/+16
2018-11-17	target/mips: Rename MMI-related opcodes	Aleksandar Markovic	1	-236/+236
2018-11-17	target/mips: Rename MMI-related masks	Aleksandar Markovic	1	-10/+10
2018-11-17	target/mips: Guard check_insn with INSN_R5900 check	Fredrik Noring	1	-3/+6
2018-11-17	target/mips: Guard check_insn_opc_user_only with INSN_R5900 check	Fredrik Noring	1	-4/+12
2018-11-17	target/mips: Fix decoding mechanism of special R5900 opcodes	Fredrik Noring	1	-4/+50
2018-11-17	target/mips: Fix decoding mechanism of R5900 DIV1 and DIVU1	Fredrik Noring	1	-6/+59