aboutsummaryrefslogtreecommitdiff
path: root/target/mips/machine.c
AgeCommit message (Expand)AuthorFilesLines
2021-05-02target/mips: Move sysemu specific files under sysemu/ subfolderPhilippe Mathieu-Daudé1-333/+0
2021-05-02target/mips: Migrate missing CPU fieldsPhilippe Mathieu-Daudé1-6/+15
2021-01-14target/mips: Extract FPU helpers to 'fpu_helper.h'Philippe Mathieu-Daudé1-0/+1
2020-12-19migration: Replace migration's JSON writer by the general oneMarkus Armbruster1-2/+2
2020-06-01target/mips: Add more CP0 register for save/restoreHuacai Chen1-2/+4
2020-01-29target/mips: Amend CP0 WatchHi register implementationYongbok Kim1-3/+3
2019-08-19target/mips: Style improvements in machine.cAleksandar Markovic1-2/+2
2019-08-16Include hw/hw.h exactly where neededMarkus Armbruster1-1/+0
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster1-1/+0
2019-02-14target/mips: compare virtual addresses in LL/SC sequenceLeon Alrae1-3/+4
2019-01-18target/mips: Add CP0 register MemoryMapIDAleksandar Markovic1-2/+3
2019-01-18target/mips: Add fields for SAARI and SAAR CP0 registersYongbok Kim1-2/+4
2018-11-27vmstate: constify VMStateFieldMarc-André Lureau1-6/+8
2018-10-18target/mips: Add CP0 PWCtl registerYongbok Kim1-2/+3
2018-10-18target/mips: Add CP0 PWSize registerYongbok Kim1-2/+3
2018-10-18target/mips: Add CP0 PWField registerYongbok Kim1-2/+3
2018-10-18target/mips: Add CP0 PWBase registerYongbok Kim1-2/+3
2018-08-16target/mips: Add CP0 BadInstrX registerStefan Markovic1-2/+3
2017-09-21mips: introduce internal.h and cleanup cpu.hPhilippe Mathieu-Daudé1-0/+1
2017-07-20target/mips: Add segmentation control registersJames Hogan1-2/+5
2017-07-20target/mips: Add CP0_Ebase.WG (write gate) supportJames Hogan1-3/+3
2017-01-24migration: extend VMStateInfoJianjun Duan1-4/+10
2016-12-20Move target-* CPU file into a target/ folderThomas Huth1-0/+302