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path: root/target/mips/cpu.c
AgeCommit message (Expand)AuthorFilesLines
2023-07-10target/mips: Implement Loongson CSR instructionsJiaxun Yang1-0/+10
2023-07-10target/mips: Rework cp0_timer with clock APIJiaxun Yang1-3/+5
2023-03-22*: Add missing includes of qemu/error-report.hRichard Henderson1-0/+1
2023-03-08target/mips: Implement CP0.Config7.WII bit supportMarcin Nowakowski1-1/+3
2023-01-13target/mips: Restrict 'qapi-commands-machine.h' to system emulationPhilippe Mathieu-Daudé1-29/+0
2023-01-13mips: Always include nanomips disassemblerPaolo Bonzini1-2/+0
2023-01-13mips: Remove support for trap and emulate KVMPaolo Bonzini1-6/+1
2022-12-16target/mips: Convert to 3-phase resetPeter Maydell1-4/+8
2022-11-08target/mips: Set CP0St_{KX, SX, UX} for Loongson-2FJiaxun Yang1-0/+6
2022-10-26target/mips: Convert to tcg_ops restore_state_to_opcRichard Henderson1-0/+1
2022-10-04hw/core: Add CPUClass.get_pcRichard Henderson1-0/+8
2022-06-11target/mips: Fix WatchHi.M handlingMarcin Nowakowski1-1/+1
2022-04-06Replace TARGET_WORDS_BIGENDIANMarc-André Lureau1-2/+2
2022-03-07target/mips: Remove duplicated MIPSCPU::cp0_count_ratePhilippe Mathieu-Daudé1-10/+0
2022-03-07target/mips: Fix cycle counter timing calculationsSimon Burge1-1/+2
2021-11-02target/mips: Make mips_cpu_tlb_fill sysemu onlyRichard Henderson1-1/+1
2021-09-14target/mips: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé1-1/+1
2021-06-24target/mips: Optimize regnames[] arraysPhilippe Mathieu-Daudé1-1/+1
2021-05-26hw/core: Constify TCGCPUOpsRichard Henderson1-1/+1
2021-05-26cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Move CPUClass::vmsd to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Introduce SysemuCPUOps structurePhilippe Mathieu-Daudé1-0/+8
2021-05-26cpu: Rename CPUClass vmsd -> legacy_vmsdPhilippe Mathieu-Daudé1-1/+1
2021-05-02target/mips: Move CP0 helpers to sysemu/cp0.cPhilippe Mathieu-Daudé1-103/+0
2021-05-02target/mips: Move exception management code to exception.cPhilippe Mathieu-Daudé1-113/+0
2021-05-02target/mips: Move Special opcodes to tcg/sysemu/special_helper.cPhilippe Mathieu-Daudé1-17/+0
2021-05-02target/mips: Restrict mmu_init() to TCGPhilippe Mathieu-Daudé1-1/+1
2021-05-02target/mips: Declare mips_env_set_pc() inlined in "internal.h"Philippe Mathieu-Daudé1-7/+1
2021-05-02target/mips: Turn printfpr() macro into a proper functionPhilippe Mathieu-Daudé1-27/+23
2021-05-02target/mips: Restrict mips_cpu_dump_state() to cpu.cPhilippe Mathieu-Daudé1-0/+77
2021-05-02target/mips: Optimize CPU/FPU regnames[] arraysPhilippe Mathieu-Daudé1-1/+1
2021-05-02target/mips: Make CPU/FPU regnames[] arrays globalPhilippe Mathieu-Daudé1-0/+7
2021-03-11Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-docs-xen-upda...Peter Maydell1-1/+1
2021-03-10semihosting: Move include/hw/semihosting/ -> include/semihosting/Philippe Mathieu-Daudé1-1/+1
2021-03-08clock: Add ClockEvent parameter to callbacksPeter Maydell1-1/+1
2021-02-18target/mips: Create mips_io_recompile_replay_branchRichard Henderson1-0/+18
2021-02-05cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana1-13/+23
2021-02-05cpu: move do_unaligned_access to tcg_opsClaudio Fontana1-1/+2
2021-02-05cpu: move cc->transaction_failed to tcg_opsClaudio Fontana1-1/+3
2021-02-05cpu: move cc->do_interrupt to tcg_opsClaudio Fontana1-2/+2
2021-02-05cpu: Move tlb_fill to tcg_opsEduardo Habkost1-1/+1
2021-02-05cpu: Move cpu_exec_* to tcg_opsEduardo Habkost1-1/+1
2021-02-05cpu: Move synchronize_from_tb() to tcg_opsEduardo Habkost1-1/+3
2021-02-05cpu: Introduce TCGCpuOperations structEduardo Habkost1-1/+1
2021-01-14target/mips: Move msa_reset() to msa_helper.cPhilippe Mathieu-Daudé1-0/+1
2021-01-14target/mips: Simplify msa_reset()Philippe Mathieu-Daudé1-4/+1
2021-01-14target/mips: Introduce ase_msa_available() helperPhilippe Mathieu-Daudé1-1/+1
2021-01-14target/mips: Rename translate_init.c as cpu-defs.cPhilippe Mathieu-Daudé1-1/+1
2021-01-14target/mips: Move common helpers from helper.c to cpu.cPhilippe Mathieu-Daudé1-6/+209
2021-01-14target/mips: Inline cpu_state_reset() in mips_cpu_reset()Philippe Mathieu-Daudé1-17/+9