aboutsummaryrefslogtreecommitdiff
path: root/target/loongarch
AgeCommit message (Expand)AuthorFilesLines
2022-07-19hw/loongarch: Add fdt supportXiaojuan Yang2-0/+4
2022-07-19target/loongarch: Fix float_convd/float_convs test failingSong Gao1-63/+80
2022-07-19target/loongarch/cpu: Fix cpucfg default valueXiaojuan Yang1-1/+1
2022-07-19target/loongarch/op_helper: Fix coverity cond_at_most errorXiaojuan Yang1-1/+1
2022-07-19target/loongarch/tlb_helper: Fix coverity integer overflow errorXiaojuan Yang1-2/+2
2022-07-19target/loongarch/cpu: Fix coverity errors about excp_namesXiaojuan Yang1-3/+3
2022-07-19target/loongarch: Fix loongarch_cpu_class_by_nameXiaojuan Yang1-5/+15
2022-07-05target/loongarch: Clean up tlb when cpu resetSong Gao1-0/+1
2022-07-04target/loongarch: Add lock when writing timer clear regXiaojuan Yang1-0/+2
2022-07-04target/loongarch: Fix the meaning of ECFG reg's VS fieldXiaojuan Yang1-0/+4
2022-07-04target/loongarch: Update READMESong Gao1-2/+37
2022-07-04target/loongarch: Adjust functions and structure to support user-modeSong Gao6-1/+72
2022-07-04target/loongarch: remove unused include hw/loader.hSong Gao1-1/+0
2022-07-04target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong exceptionSong Gao2-2/+4
2022-07-04target/loongarch: Fix missing update CSR_BADVSong Gao1-4/+6
2022-07-04target/loongarch: remove badaddr from CPULoongArchSong Gao2-3/+1
2022-06-06target/loongarch: Add gdb support.Xiaojuan Yang4-0/+95
2022-06-06hw/loongarch: Add LoongArch load elf function.Xiaojuan Yang1-0/+2
2022-06-06hw/loongarch: Add support loongson3 virt machine type.Xiaojuan Yang2-0/+4
2022-06-06target/loongarch: Add timer related instructions support.Xiaojuan Yang6-0/+56
2022-06-06target/loongarch: Add other core instructions supportXiaojuan Yang7-0/+233
2022-06-06target/loongarch: Add TLB instruction supportXiaojuan Yang5-0/+499
2022-06-06target/loongarch: Add LoongArch IOCSR instructionXiaojuan Yang8-0/+197
2022-06-06target/loongarch: Add LoongArch CSR instructionXiaojuan Yang7-1/+484
2022-06-06target/loongarch: Add constant timer supportXiaojuan Yang5-0/+77
2022-06-06target/loongarch: Add LoongArch interrupt and exception handleXiaojuan Yang3-0/+234
2022-06-06target/loongarch: Add MMU support for LoongArch CPU.Xiaojuan Yang7-1/+418
2022-06-06target/loongarch: Implement qmp_query_cpu_definitions()Xiaojuan Yang1-0/+26
2022-06-06target/loongarch: Add basic vmstate description of CPU.Xiaojuan Yang4-0/+94
2022-06-06target/loongarch: Add CSRs definitionXiaojuan Yang3-0/+313
2022-06-06target/loongarch: Add system emulation introductionXiaojuan Yang1-0/+54
2022-06-06target/loongarch: Add target build suportSong Gao1-0/+19
2022-06-06target/loongarch: Add disassemblerSong Gao1-0/+610
2022-06-06target/loongarch: Add branch instruction translationSong Gao3-0/+112
2022-06-06target/loongarch: Add floating point load/store instruction translationSong Gao3-0/+178
2022-06-06target/loongarch: Add floating point move instruction translationSong Gao5-0/+203
2022-06-06target/loongarch: Add floating point conversion instruction translationSong Gao5-0/+488
2022-06-06target/loongarch: Add floating point comparison instruction translationSong Gao6-0/+139
2022-06-06target/loongarch: Add floating point arithmetic instruction translationSong Gao7-0/+611
2022-06-06target/loongarch: Add fixed point extra instruction translationSong Gao5-0/+118
2022-06-06target/loongarch: Add fixed point atomic instruction translationSong Gao4-1/+159
2022-06-06target/loongarch: Add fixed point load/store instruction translationSong Gao5-0/+308
2022-06-06target/loongarch: Add fixed point bit instruction translationSong Gao5-0/+277
2022-06-06target/loongarch: Add fixed point shift instruction translationSong Gao3-0/+129
2022-06-06target/loongarch: Add fixed point arithmetic instruction translationSong Gao4-0/+485
2022-06-06target/loongarch: Add main translation routinesSong Gao4-0/+214
2022-06-06target/loongarch: Add core definitionSong Gao4-0/+606
2022-06-06target/loongarch: Add READMESong Gao1-0/+10