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path: root/target/loongarch/helper.h
AgeCommit message (Expand)AuthorFilesLines
2023-09-20target/loongarch: Implement xvshuf xvperm{i} xvshuf4iSong Gao1-0/+3
2023-09-20target/loongarch: Implement xvreplve xvinsve0 xvpickveSong Gao1-0/+5
2023-09-20target/loongarch: Implement xvbitsel xvsetSong Gao1-8/+8
2023-09-20target/loongarch: Implement xvfcmpSong Gao1-4/+4
2023-09-20target/loongarch: Implement vext2xvSong Gao1-0/+13
2023-09-20target/loongarch: Use gen_helper_gvec_2i for 2OP + imm vector instructionsSong Gao1-73/+73
2023-09-20target/loongarch: Use gen_helper_gvec_2 for 2OP vector instructionsSong Gao1-29/+29
2023-09-20target/loongarch: Use gen_helper_gvec_2_ptr for 2OP + env vector instructionsSong Gao1-59/+59
2023-09-20target/loongarch: Use gen_helper_gvec_3 for 3OP vector instructionsSong Gao1-107/+107
2023-09-20target/loongarch: Use gen_helper_gvec_3_ptr for 3OP + env vector instructionsSong Gao1-24/+24
2023-09-20target/loongarch: Use gen_helper_gvec_4 for 4OP vector instructionsSong Gao1-1/+1
2023-09-20target/loongarch: Use gen_helper_gvec_4_ptr for 4OP + env vector instructionsSong Gao1-8/+8
2023-07-24target/loongarch: Fix the CSRRD CPUID instruction on big endian hostsThomas Huth1-0/+1
2023-05-06target/loongarch: Implement vilvl vilvh vextrins vshufSong Gao1-0/+25
2023-05-06target/loongarch: Implement vreplve vpack vpickSong Gao1-0/+18
2023-05-06target/loongarch: Implement vbitsel vsetSong Gao1-0/+11
2023-05-06target/loongarch: Implement vfcmpSong Gao1-0/+5
2023-05-06target/loongarch: Implement vseq vsle vsltSong Gao1-0/+23
2023-05-06target/loongarch: Implement LSX fpu fcvt instructionsSong Gao1-0/+56
2023-05-06target/loongarch: Implement LSX fpu arith instructionsSong Gao1-0/+41
2023-05-06target/loongarch: Implement vfrstpSong Gao1-0/+5
2023-05-06target/loongarch: Implement vbitclr vbitset vbitrevSong Gao1-0/+27
2023-05-06target/loongarch: Implement vpcntSong Gao1-0/+5
2023-05-06target/loongarch: Implement vclo vclzSong Gao1-0/+9
2023-05-06target/loongarch: Implement vssrlrn vssrarnSong Gao1-0/+30
2023-05-06target/loongarch: Implement vssrln vssranSong Gao1-0/+30
2023-05-06target/loongarch: Implement vsrlrn vsrarnSong Gao1-0/+16
2023-05-06target/loongarch: Implement vsrln vsranSong Gao1-0/+16
2023-05-06target/loongarch: Implement vsrlr vsrarSong Gao1-0/+18
2023-05-06target/loongarch: Implement vsllwil vextlSong Gao1-0/+9
2023-05-06target/loongarch: Implement LSX logic instructionsSong Gao1-0/+2
2023-05-06target/loongarch: Implement vmskltz/vmskgez/vmsknzSong Gao1-0/+7
2023-05-06target/loongarch: Implement vsigncovSong Gao1-0/+5
2023-05-06target/loongarch: Implement vexthSong Gao1-0/+9
2023-05-06target/loongarch: Implement vsatSong Gao1-0/+9
2023-05-06target/loongarch: Implement vdiv/vmodSong Gao1-0/+17
2023-05-06target/loongarch: Implement vmadd/vmsub/vmaddw{ev/od}Song Gao1-0/+30
2023-05-06target/loongarch: Implement vmul/vmuh/vmulw{ev/od}Song Gao1-0/+30
2023-05-06target/loongarch: Implement vmax/vminSong Gao1-0/+18
2023-05-06target/loongarch: Implement vaddaSong Gao1-0/+5
2023-05-06target/loongarch: Implement vabsdSong Gao1-0/+9
2023-05-06target/loongarch: Implement vavg/vavgrSong Gao1-0/+18
2023-05-06target/loongarch: Implement vaddw/vsubwSong Gao1-0/+45
2023-05-06target/loongarch: Implement vhaddw/vhsubwSong Gao1-0/+18
2022-08-08target/loongarch: Remove cpu_fcsr0Richard Henderson1-1/+1
2022-07-04target/loongarch: Adjust functions and structure to support user-modeSong Gao1-0/+2
2022-06-06target/loongarch: Add timer related instructions support.Xiaojuan Yang1-0/+2
2022-06-06target/loongarch: Add other core instructions supportXiaojuan Yang1-0/+5
2022-06-06target/loongarch: Add TLB instruction supportXiaojuan Yang1-0/+13
2022-06-06target/loongarch: Add LoongArch IOCSR instructionXiaojuan Yang1-0/+8