aboutsummaryrefslogtreecommitdiff
path: root/target/i386/translate.c
AgeCommit message (Expand)AuthorFilesLines
2020-12-10target/i386: fix operand order for PDEP and PEXTPaolo Bonzini1-4/+4
2020-11-15x86 tcg cpus: Fix Lesser GPL version numberChetan Pant1-1/+1
2020-07-24target/i386: Save cc_op before loop insnsRichard Henderson1-0/+1
2020-07-10target/i386: implement undocumented "smsw r32" behaviorPaolo Bonzini1-6/+7
2020-07-10target/i386: remove gen_io_endPaolo Bonzini1-13/+9
2020-07-10target/i386: fix IEEE SSE floating-point exception raisingJoseph Myers1-0/+1
2020-03-26linux-user/i386: Emulate x86_64 vsyscallsRichard Henderson1-1/+13
2020-01-15tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé1-1/+1
2019-12-18qemu_log_lock/unlock now preserves the qemu_logfile handle.Robert Foley1-2/+3
2019-10-28target/i386: fetch code with translator_ldEmilio G. Cota1-5/+5
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen1-66/+66
2019-08-20icount: remove unnecessary gen_io_end callsPavel Dovgalyuk1-10/+0
2019-05-22target/i386: Implement CPUID_EXT_RDRANDRichard Henderson1-15/+47
2019-04-24tcg: Hoist max_insns computation to tb_gen_codeRichard Henderson1-2/+2
2019-04-09target/i386: Generate #UD for LOCK on a register incrementPeter Maydell1-0/+5
2019-01-11avoid TABs in files that only contain a fewPaolo Bonzini1-6/+6
2018-11-27target/i386: Generate #UD when applying LOCK to a register destinationRichard Henderson1-15/+20
2018-10-30target/i386: Remove #ifdeffed-out icebp debugging hackPeter Maydell1-6/+0
2018-10-02target/i386: fix translation for icount modePavel Dovgalyuk1-3/+3
2018-10-02target/i386: rename HF_SVMI_MASK to HF_GUEST_MASKPaolo Bonzini1-2/+2
2018-10-02target/i386: move x86_64_hregs to DisasContextEmilio G. Cota1-153/+154
2018-10-02target/i386: move cpu_tmp1_i64 to DisasContextEmilio G. Cota1-80/+80
2018-10-02target/i386: move cpu_tmp3_i32 to DisasContextEmilio G. Cota1-32/+32
2018-10-02target/i386: move cpu_tmp2_i32 to DisasContextEmilio G. Cota1-173/+174
2018-10-02target/i386: move cpu_ptr1 to DisasContextEmilio G. Cota1-26/+26
2018-10-02target/i386: move cpu_ptr0 to DisasContextEmilio G. Cota1-49/+52
2018-10-02target/i386: move cpu_tmp4 to DisasContextEmilio G. Cota1-39/+39
2018-10-02target/i386: move cpu_tmp0 to DisasContextEmilio G. Cota1-138/+144
2018-10-02target/i386: move cpu_T1 to DisasContextEmilio G. Cota1-171/+170
2018-10-02target/i386: move cpu_T0 to DisasContextEmilio G. Cota1-580/+594
2018-10-02target/i386: move cpu_A0 to DisasContextEmilio G. Cota1-236/+236
2018-10-02target/i386: move cpu_cc_srcT to DisasContextEmilio G. Cota1-14/+18
2018-08-23fix "Missing break in switch" coverity reportsPaolo Bonzini1-0/+2
2018-06-28target-i386: Allow interrupt injection after STGIJan Kiszka1-1/+2
2018-06-28target/i386: Fix BLSR and BLSIRichard Henderson1-17/+9
2018-06-01tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson1-4/+4
2018-05-20tcg: fix s/compliment/complement/ typosEmilio G. Cota1-1/+1
2018-05-09translator: merge max_insns into DisasContextBaseEmilio G. Cota1-4/+1
2018-04-09Add missing bit for SSE instr in VEX decodingEugene Minibaev1-1/+3
2018-04-05target/i386: Fix andn instructionAlexandro Sanchez Bach1-1/+1
2017-12-29tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*Richard Henderson1-7/+6
2017-12-21target/i386: Fix handling of VEX prefixesPeter Maydell1-1/+1
2017-12-21target/i386: Fix compiler warningsStefan Weil1-3/+4
2017-10-27Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell1-7/+1
2017-10-25disas: Remove unused flags argumentsRichard Henderson1-1/+1
2017-10-25target/i386: Convert to disas_set_info hookRichard Henderson1-7/+1
2017-10-24tcg: Initialize cpu_env genericallyRichard Henderson1-3/+0
2017-10-24tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota1-1/+1
2017-10-24target/i386: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota1-2/+2
2017-10-24tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota1-24/+24
generated by cgit v1.1 at 2024-10-28 13:38:44 +0000