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Author
Files
Lines
2022-02-22
Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2022-02-...
Peter Maydell
4
-0
/
+4
2022-02-21
exec/exec-all: Move 'qemu/log.h' include in units requiring it
Philippe Mathieu-Daudé
4
-0
/
+4
2022-02-16
target/i386: add TCG support for UMIP
Gareth Webb
1
-0
/
+15
2022-02-09
target/i386: use CPU_LOG_INT for IRQ servicing
Alex Bennée
1
-2
/
+2
2022-01-08
exec/memop: Adding signedness to quad definitions
Frédéric Pétrot
2
-19
/
+19
2021-12-15
target/i386: Use assert() to sanity-check b1 in SSE decode
Peter Maydell
1
-9
/
+3
2021-11-08
target-i386: mmu: fix handling of noncanonical virtual addresses
Paolo Bonzini
1
-9
/
+12
2021-11-08
target-i386: mmu: use pg_mode instead of HF_LMA_MASK
Paolo Bonzini
1
-2
/
+2
2021-11-02
target/i386: Implement x86_cpu_record_sigsegv
Richard Henderson
3
-7
/
+25
2021-10-15
target/i386: Drop check for singlestep_enabled
Richard Henderson
2
-11
/
+1
2021-10-15
target/i386: Check CF_NO_GOTO_TB for dc->jmp_opt
Richard Henderson
1
-2
/
+3
2021-10-13
target/i386: Use MO_128 for 16 byte atomics
Richard Henderson
1
-1
/
+1
2021-10-05
tcg: Rename TCGMemOpIdx to MemOpIdx
Richard Henderson
1
-2
/
+2
2021-09-14
target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder
Philippe Mathieu-Daudé
2
-64
/
+62
2021-09-14
target/i386: Restrict cpu_exec_interrupt() handler to sysemu
Philippe Mathieu-Daudé
3
-9
/
+5
2021-09-14
accel/tcg: Rename user-mode do_interrupt hack as fake_user_interrupt
Philippe Mathieu-Daudé
1
-2
/
+4
2021-09-14
target/i386: Simplify TARGET_X86_64 #ifdef'ry
Philippe Mathieu-Daudé
1
-3
/
+1
2021-09-14
accel/tcg: Add DisasContextBase argument to translator_ld*
Ilya Leoshkevich
1
-5
/
+5
2021-09-13
target/i386: Added vVMLOAD and vVMSAVE feature
Lara Lazier
2
-1
/
+30
2021-09-13
target/i386: Added changed priority check for VIRQ
Lara Lazier
2
-15
/
+7
2021-09-13
target/i386: Added ignore TPR check in ctl_has_irq
Lara Lazier
1
-0
/
+5
2021-09-13
target/i386: Added VGIF V_IRQ masking capability
Lara Lazier
1
-0
/
+12
2021-09-13
target/i386: Moved int_ctl into CPUX86State structure
Lara Lazier
3
-36
/
+18
2021-09-13
target/i386: Added VGIF feature
Lara Lazier
1
-2
/
+29
2021-09-13
target/i386: VMRUN and VMLOAD canonicalizations
Lara Lazier
1
-10
/
+17
2021-08-13
target/i386: Fixed size of constant for Windows
Lara Lazier
2
-2
/
+2
2021-07-29
target/i386: fix typo in ctl_has_irq
Paolo Bonzini
1
-1
/
+1
2021-07-29
target/i386: Added consistency checks for event injection
Lara Lazier
1
-0
/
+6
2021-07-23
i386: do not call cpudef-only models functions for max, host, base
Claudio Fontana
1
-3
/
+8
2021-07-23
target/i386: Added consistency checks for CR3
Lara Lazier
2
-3
/
+14
2021-07-22
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...
Peter Maydell
2
-4
/
+59
2021-07-22
target/i386: Added consistency checks for EFER
Lara Lazier
1
-0
/
+39
2021-07-22
target/i386: Added consistency checks for CR4
Lara Lazier
2
-3
/
+9
2021-07-22
target/i386: Added V_INTR_PRIO check to virtual interrupts
Lara Lazier
1
-1
/
+11
2021-07-21
accel/tcg: Remove TranslatorOps.breakpoint_check
Richard Henderson
1
-28
/
+0
2021-07-21
target/i386: Implement debug_check_breakpoint
Richard Henderson
1
-0
/
+12
2021-07-21
tcg: Rename helper_atomic_*_mmu and provide for user-only
Richard Henderson
1
-13
/
+2
2021-07-13
target/i386: Correct implementation for FCS, FIP, FDS and FDP
Ziqiao Kong
2
-9
/
+54
2021-07-13
target/i386: Split out do_fninit
Richard Henderson
1
-14
/
+8
2021-07-13
target/i386: Trivial code motion and code style fix
Ziqiao Kong
1
-435
/
+446
2021-07-13
target/i386: Tidy hw_breakpoint_remove
Dmitry Voronetskiy
1
-2
/
+2
2021-07-12
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...
Peter Maydell
2
-22
/
+5
2021-07-09
target/i386: Use cpu_breakpoint_test in breakpoint_handler
Richard Henderson
1
-9
/
+3
2021-07-09
target/i386: Use translator_use_goto_tb
Richard Henderson
1
-12
/
+2
2021-07-09
tcg: Avoid including 'trace-tcg.h' in target translate.c
Philippe Mathieu-Daudé
1
-1
/
+0
2021-07-09
target/i386: fix exceptions for MOV to DR
Paolo Bonzini
4
-41
/
+32
2021-07-09
target/i386: Added DR6 and DR7 consistency checks
Lara Lazier
1
-1
/
+8
2021-07-09
target/i386: Added MSRPM and IOPM size check
Lara Lazier
1
-0
/
+15
2021-07-06
target/i386: Move X86XSaveArea into TCG
David Edmondson
2
-0
/
+58
2021-07-06
target/i386: Populate x86_ext_save_areas offsets using cpuid where possible
David Edmondson
1
-0
/
+20
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