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path: root/target/i386/tcg/decode-new.c.inc
AgeCommit message (Expand)AuthorFilesLines
2024-06-17target/i386: convert CMPXCHG to new decoderPaolo Bonzini1-1/+2
2024-06-17target/i386: convert XADD to new decoderPaolo Bonzini1-1/+2
2024-06-17target/i386: convert LZCNT/TZCNT/BSF/BSR/POPCNT to new decoderPaolo Bonzini1-2/+50
2024-06-17target/i386: convert SHLD/SHRD to new decoderPaolo Bonzini1-2/+6
2024-06-17target/i386: convert non-grouped, helper-based 2-byte opcodesPaolo Bonzini1-12/+36
2024-06-17target/i386: split X86_CHECK_prot into PE and VM86 checksPaolo Bonzini1-2/+7
2024-06-17target/i386: finish converting 0F AE to the new decoderPaolo Bonzini1-6/+42
2024-06-17target/i386: fix bad sorting of entries in the 0F tablePaolo Bonzini1-47/+46
2024-06-17target/i386: convert MOV from/to CR and DR to new decoderPaolo Bonzini1-3/+58
2024-06-11target/i386: fix processing of intercept 0 (read CR0)Paolo Bonzini1-2/+2
2024-06-11target/i386: replace NoSeg special with NoLoadEAPaolo Bonzini1-8/+4
2024-06-11target/i386: change X86_ENTRYwr to use T0, use it for movesPaolo Bonzini1-24/+24
2024-06-11target/i386: change X86_ENTRYr to use T0Paolo Bonzini1-3/+3
2024-06-11target/i386: put BLS* input in T1, use generic flag writebackPaolo Bonzini1-2/+2
2024-06-11target/i386: remove CPUX86State argument from generator functionsPaolo Bonzini1-2/+2
2024-06-08target/i386: cleanup PAUSE helpersPaolo Bonzini1-1/+14
2024-06-08target/i386: cleanup HLT helpersPaolo Bonzini1-2/+2
2024-06-05target/i386: fix memory opsize for Mov to/from SegXinyu Li1-2/+11
2024-06-05target/i386: fix SSE and SSE2 feature checkXinyu Li1-2/+2
2024-05-22target/i386: clean up AAM/AADPaolo Bonzini1-2/+2
2024-05-10target/i386: move prefetch and multi-byte UD/NOP to new decoderPaolo Bonzini1-3/+21
2024-05-07target/i386: remove duplicate prefix decodingPaolo Bonzini1-12/+51
2024-05-07target/i386: remove now-converted opcodes from old decoderPaolo Bonzini1-3/+0
2024-05-07target/i386: port extensions of one-byte opcodes to new decoderPaolo Bonzini1-0/+20
2024-05-07target/i386: move BSWAP to new decoderPaolo Bonzini1-0/+9
2024-05-07target/i386: move remaining conditional operations to new decoderPaolo Bonzini1-0/+56
2024-05-07target/i386: move C0-FF opcodes to new decoder (except for x87)Paolo Bonzini1-0/+153
2024-05-07target/i386: move 60-BF opcodes to new decoderPaolo Bonzini1-0/+185
2024-05-07target/i386: allow instructions with more than one immediatePaolo Bonzini1-1/+1
2024-05-07target/i386: move 00-5F opcodes to new decoderPaolo Bonzini1-0/+120
2024-05-07target/i386: reintroduce debugging mechanismPaolo Bonzini1-0/+3
2023-12-29target/i386: implement CMPccXADDPaolo Bonzini1-0/+25
2023-12-29target/i386: introduce flags writeback mechanismPaolo Bonzini1-0/+34
2023-12-29target/i386: adjust decoding of J operandPaolo Bonzini1-10/+0
2023-12-29target/i386: do not decode string source/destination into decode->memPaolo Bonzini1-18/+2
2023-12-29target/i386: add X86_SPECIALs for MOVSX and MOVZXPaolo Bonzini1-5/+13
2023-12-29target/i386: rename zext0/zext2 and make them closer to the manualPaolo Bonzini1-8/+8
2023-12-29target/i386: reimplement check for validity of LOCK prefixPaolo Bonzini1-7/+10
2023-12-29target/i386: document more deviations from the manualPaolo Bonzini1-0/+12
2023-10-25target/i386: validate VEX.W for AVX instructionsPaolo Bonzini1-42/+102
2023-10-25target/i386: group common checks in the decoding phasePaolo Bonzini1-21/+64
2023-10-25target/i386: implement SHA instructionsPaolo Bonzini1-0/+11
2023-10-04accel/tcg: Replace CPUState.env_ptr with cpu_env()Richard Henderson1-1/+1
2023-10-03tcg: Rename cpu_env to tcg_envRichard Henderson1-1/+1
2023-09-01target/i386: fix memory operand size for CVTPS2PDPaolo Bonzini1-2/+12
2023-09-01target/i386: generalize operand size "ph" for use in CVTPS2PDPaolo Bonzini1-3/+3
2023-08-04target/i386: Check CR0.TS before enter_mmxMatt Borgerson1-4/+6
2023-05-18target/i386: Fix exception classes for MOVNTPS/MOVNTPD.Ricky Zhou1-2/+3
2023-05-18target/i386: Fix exception classes for SSE/AVX instructions.Ricky Zhou1-23/+23
2023-05-18target/i386: Fix and add some comments next to SSE/AVX instructions.Ricky Zhou1-12/+12
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