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path: root/target/i386/cpu.c
AgeCommit message (Expand)AuthorFilesLines
2021-07-06target/i386: Make x86_ext_save_areas visible outside cpu.cDavid Edmondson1-6/+1
2021-06-25target/i386: kvm: add support for TSC scalingPaolo Bonzini1-1/+1
2021-06-04i386: run accel_cpu_instance_init as post_initClaudio Fontana1-3/+7
2021-06-04i386: reorder call to cpu_exec_realizefnClaudio Fontana1-28/+51
2021-05-31i386: drop FEAT_HYPERV feature leavesVitaly Kuznetsov1-88/+0
2021-05-31i386: keep hyperv_vendor string up-to-dateVitaly Kuznetsov1-10/+9
2021-05-31i386: use better matching family/model/stepping for 'max' CPUDaniel P. Berrangé1-0/+6
2021-05-31i386: use better matching family/model/stepping for 'qemu64' CPUDaniel P. Berrangé1-3/+3
2021-05-31target/i386/cpu: Constify X86CPUDefinitionPhilippe Mathieu-Daudé1-6/+7
2021-05-31target/i386/cpu: Constify CPUCachesPhilippe Mathieu-Daudé1-4/+4
2021-05-31target/i386: Add CPU model versions supporting 'xsaves'Vitaly Kuznetsov1-56/+94
2021-05-28Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210526' into...Peter Maydell1-10/+20
2021-05-26cpu: Move CPUClass::get_paging_enabled to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+3
2021-05-26cpu: Move CPUClass::get_memory_mapping to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Move CPUClass::write_elf* to SysemuCPUOpsPhilippe Mathieu-Daudé1-4/+4
2021-05-26cpu: Move CPUClass::get_crash_info to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Move CPUClass::vmsd to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Introduce SysemuCPUOps structurePhilippe Mathieu-Daudé1-0/+8
2021-05-26cpu: Rename CPUClass vmsd -> legacy_vmsdPhilippe Mathieu-Daudé1-1/+1
2021-05-26i386/cpu: Expose AVX_VNNI instruction to guestYang Zhong1-2/+2
2021-05-10i386: split off sysemu part of cpu.cClaudio Fontana1-379/+6
2021-05-10accel: introduce new accessor functionsClaudio Fontana1-7/+2
2021-05-10cpu: call AccelCPUClass::cpu_realizefn in cpu_exec_realizefnClaudio Fontana1-13/+7
2021-05-10i386: split cpu accelerators from cpu.c, using AccelCPUClassClaudio Fontana1-342/+41
2021-04-09i386: Add missing cpu feature bits in EPYC-Rome modelBabu Moger1-0/+12
2021-03-19target/i386: allow modifying TCG phys-addr-bitsPaolo Bonzini1-15/+8
2021-03-09Various spelling fixesMichael Tokarev1-1/+1
2021-02-25target/i386: Add bus lock debug exception supportChenyi Qiang1-1/+1
2021-02-25target/i386: update to show preferred boolean syntax for -cpuDaniel P. Berrangé1-1/+1
2021-02-18i386: Add the support for AMD EPYC 3rd generation processorsBabu Moger1-1/+106
2021-02-16sev/i386: Add initial support for SEV-ESTom Lendacky1-0/+1
2021-02-08target/i386: Expose VMX entry/exit load pkrs control bitsChenyi Qiang1-2/+2
2021-02-08target/i86: implement PKSPaolo Bonzini1-2/+2
2021-02-08x86/cpu: Populate SVM CPUID feature bitsWei Huang1-3/+3
2021-02-08target/i386: do not set LM for 32-bit emulation "-cpu host/max"Paolo Bonzini1-0/+5
2021-01-28qapi: Use QAPI_LIST_APPEND in trivial casesEric Blake1-16/+8
2021-01-21x86/cpu: Use max host physical address if -cpu max option is appliedYang Weijiang1-0/+1
2020-12-19qapi: Use QAPI_LIST_PREPEND() where possibleEric Blake1-5/+1
2020-12-16i386: move TCG cpu class initialization to tcg/Claudio Fontana1-22/+11
2020-12-16x86/cpu: Add AVX512_FP16 cpu featureCathy Zhang1-1/+1
2020-12-16i386: move hyperv_limits initialization to x86_cpu_realizefn()Vitaly Kuznetsov1-0/+5
2020-12-16i386: move hyperv_version_id initialization to x86_cpu_realizefn()Vitaly Kuznetsov1-0/+4
2020-12-16i386: move hyperv_interface_id initialization to x86_cpu_realizefn()Vitaly Kuznetsov1-0/+6
2020-12-16i386: move hyperv_vendor_id initialization to x86_cpu_realizefn()Vitaly Kuznetsov1-1/+22
2020-12-16i386: move kvm accel files into kvm/Claudio Fontana1-1/+1
2020-12-15i386: Register feature bit properties as class propertiesEduardo Habkost1-24/+16
2020-12-11Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell1-1/+7
2020-12-10i386/cpu: Make the Intel PT LIP feature configurableLuwei Kang1-1/+30
generated by cgit v1.1 at 2025-01-08 18:18:57 +0000