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path: root/target/i386/cpu.c
AgeCommit message (Expand)AuthorFilesLines
2024-10-31target/i386: Introduce GraniteRapids-v2 modelTao Su1-0/+17
2024-10-31target/i386: Add AVX512 state when AVX10 is supportedTao Su1-1/+9
2024-10-31target/i386: Add feature dependencies for AVX10Tao Su1-0/+16
2024-10-31target/i386: add CPUID.24 features for AVX10Tao Su1-0/+15
2024-10-31target/i386: add AVX10 feature and AVX10 version propertyTao Su1-7/+57
2024-10-31target/i386: return bool from x86_cpu_filter_featuresPaolo Bonzini1-9/+11
2024-10-31target/i386: do not rely on ExtSaveArea for accelerator-supported XCR0 bitsPaolo Bonzini1-2/+31
2024-10-31target/i386: cpu: set correct supported XCR0 features for TCGPaolo Bonzini1-2/+4
2024-10-31target/i386: Expose new feature bits in CPUID 8000_0021_EAX/EBXBabu Moger1-2/+9
2024-10-31target/i386: Expose bits related to SRSO vulnerabilityBabu Moger1-1/+1
2024-10-31target/i386: Add PerfMonV2 feature bitSandipan Das1-0/+26
2024-10-31target/i386: Fix minor typo in NO_NESTED_DATA_BP feature bitBabu Moger1-1/+1
2024-10-18Merge tag 'pull-error-2024-10-18' of https://repo.or.cz/qemu/armbru into stagingPeter Maydell1-32/+27
2024-10-18target/i386/cpu: Improve errors for out of bounds property valuesMarkus Armbruster1-11/+9
2024-10-18target/i386/cpu: Avoid mixing signed and unsigned in property settersMarkus Armbruster1-24/+21
2024-10-17target/i386: Fix conditional CONFIG_SYNDBG enablementVitaly Kuznetsov1-0/+2
2024-10-17target/i386: Add more features enumerated by CPUID.7.2.EDXChao Gao1-2/+2
2024-10-17target/i386: Make invtsc migratable when user sets tsc-khz explicitlyXiaoyao Li1-2/+9
2024-10-17target/i386: Enable fdp-excptn-only and zero-fcs-fdsXiaoyao Li1-2/+2
2024-10-13target/i386/gdbstub: Expose orig_axIlya Leoshkevich1-0/+1
2024-10-03target/i386: Expose IBPB-BRTYPE and SBPB CPUID bits to the guestFabiano Rosas1-2/+2
2024-10-02target/i386: Add VMX control bits for nested FRED supportXin Li (Intel)1-2/+2
2024-07-31target/i386/cpu: Mask off SGX/SGX_LC feature words for non-PC machineZhao Liu1-0/+15
2024-07-31target/i386/cpu: Add dependencies of CPUID 0x12 leavesZhao Liu1-0/+12
2024-07-31target/i386/cpu: Explicitly express SGX_LC and SGX feature words dependencyZhao Liu1-5/+4
2024-07-31target/i386/cpu: Remove unnecessary SGX feature words checksZhao Liu1-15/+1
2024-07-31target/i386: Change unavail from u32 to u64Xiong Zhang1-1/+1
2024-07-16target/i386/tcg: Introduce x86_mmu_index_{kernel_,}plRichard Henderson1-3/+24
2024-07-03target/i386: add avx-vnni-int16 featurePaolo Bonzini1-1/+1
2024-07-03target/i386: do not include undefined bits in the AMD topoext leafPaolo Bonzini1-0/+4
2024-07-03target/i386: drop AMD machine check bits from Intel CPUIDPaolo Bonzini1-4/+19
2024-07-03target/i386: pass X86CPU to x86_cpu_get_supported_feature_wordPaolo Bonzini1-6/+5
2024-06-19target/i386: Remove X86CPU::kvm_no_smi_migration fieldPhilippe Mathieu-Daudé1-2/+0
2024-06-11i386/cpu: fixup number of addressable IDs for processor cores in the physical...Chuang Xu1-4/+2
2024-06-08i386: Add support for overflow recoveryJohn Allen1-1/+1
2024-06-08i386: Add support for SUCCOR featureJohn Allen1-1/+17
2024-06-08target/i386: enumerate VMX nested-exception supportXin Li1-0/+1
2024-06-08target/i386: add support for FRED in CPUID enumerationXin Li1-1/+13
2024-06-05i386/cpu: Set SEV-SNP CPUID bit when SNP enabledMichael Roth1-0/+1
2024-05-22i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[0x8000001D].EAX[bits 2...Zhao Liu1-9/+1
2024-05-22i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[4]Zhao Liu1-43/+51
2024-05-22i386: Add cache topology info in CPUCacheInfoZhao Liu1-0/+36
2024-05-22i386/cpu: Introduce module-id to X86CPUZhao Liu1-0/+2
2024-05-22i386: Expose module level in CPUID[0x1F]Zhao Liu1-0/+6
2024-05-22i386: Support modules_per_die in X86CPUTopoInfoZhao Liu1-5/+8
2024-05-22i386: Introduce module level cpu topology to CPUX86StateZhao Liu1-0/+1
2024-05-22i386/cpu: Decouple CPUID[0x1F] subleaf with specific topology levelZhao Liu1-25/+110
2024-05-22i386: Split topology types of CPUID[0x1F] from the definitions of CPUID[0xB]Zhao Liu1-7/+7
2024-05-22i386/cpu: Introduce bitmap to cache available CPU topology levelsZhao Liu1-3/+15
2024-05-22i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid()Zhao Liu1-13/+18
generated by cgit v1.1 at 2024-12-25 07:19:22 +0000