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AgeCommit message (Expand)AuthorFilesLines
2024-12-11target/hexagon: Set default NaN pattern explicitlyPeter Maydell1-0/+2
2024-10-15target/hexagon: Use explicit little-endian LD/ST APIPhilippe Mathieu-Daudé1-5/+5
2024-10-15target/hexagon: Replace ldtul_p() -> ldl_p()Philippe Mathieu-Daudé1-5/+5
2024-09-20target/hexagon: Rename macros.inc -> macros.h.incPhilippe Mathieu-Daudé4-4/+4
2024-08-13target/hexagon: don't look for static glibAlyssa Ross1-1/+1
2024-08-07target/hexagon: switch to dc set_props() listBrian Cain1-10/+8
2024-08-07target/hexagon: define a v66 CPUBrian Cain2-0/+3
2024-08-07target/hexagon/idef-parser: Remove self-assignmentAnton Johansson1-1/+0
2024-08-07Hexagon: lldb read/write predicate registers p0/p1/p2/p3Taylor Simpson1-1/+18
2024-08-07Hexagon: fix F2_conv_* instructions for negative zeroMatheus Tavares Bernardino1-9/+9
2024-07-17target/hexagon/imported/mmvec: Fix superfluous trailing semicolonZhao Liu1-1/+1
2024-06-08target/hexagon: idef-parser simplify predicate initAnton Johansson2-14/+14
2024-06-08target/hexagon: idef-parser fix leak of init_listAnton Johansson1-1/+8
2024-06-08target/hexagon: idef-parser remove undefined functionsAnton Johansson1-13/+0
2024-06-08target/hexagon: idef-parser remove unused definesAnton Johansson1-10/+0
2024-06-08Hexagon: add PC alignment check and exceptionMatheus Tavares Bernardino4-8/+15
2024-06-08Hexagon: fix HVX store newMatheus Tavares Bernardino1-3/+6
2024-05-15target/hexagon: Use translator_ldl in pkt_crosses_pageRichard Henderson1-2/+1
2024-05-15accel/tcg: Provide default implementation of disas_logRichard Henderson1-9/+0
2024-05-15accel/tcg: Use vaddr in translator_ld*Richard Henderson1-0/+1
2024-05-06Merge tag 'accel-20240506' of https://github.com/philmd/qemu into stagingRichard Henderson1-1/+1
2024-05-06accel/tcg: Access tcg_cflags with getter / setterPhilippe Mathieu-Daudé1-1/+1
2024-05-05Hexagon (target/hexagon) Remove hex_common.read_attribs_fileTaylor Simpson11-118/+52
2024-05-05Hexagon (target/hexagon) Remove gen_shortcode.pyTaylor Simpson4-81/+0
2024-05-05Hexagon (target/hexagon) Remove gen_op_regs.pyTaylor Simpson3-138/+2
2024-05-05Hexagon (target/hexagon) Remove uses of op_regs_generated.h.incTaylor Simpson4-110/+13
2024-05-05Hexagon (target/hexagon) Mark has_pred_dest in trans functionsTaylor Simpson3-0/+9
2024-05-05Hexagon (target/hexagon) Mark dest_idx in trans functionsTaylor Simpson4-0/+11
2024-05-05Hexagon (target/hexagon) Mark new_read_idx in trans functionsTaylor Simpson4-6/+16
2024-05-05Hexagon (target/hexagon) Add is_old/is_new to Register classTaylor Simpson1-0/+12
2024-05-05Hexagon (target/hexagon) Only pass env to generated helper when neededTaylor Simpson3-8/+32
2024-05-05Hexagon (target/hexagon) Pass SP explicitly to helpers that need itTaylor Simpson3-2/+14
2024-05-05Hexagon (target/hexagon) Pass P0 explicitly to helpers that need itTaylor Simpson2-2/+12
2024-05-05Hexagon (target/hexagon) Enable more short-circuit packets (HVX)Taylor Simpson4-95/+115
2024-05-05Hexagon (target/hexagon) Enable more short-circuit packets (scalar core)Taylor Simpson2-23/+11
2024-05-05Hexagon (target/hexagon) Analyze reads before writesTaylor Simpson4-49/+83
2024-04-26accel: Include missing 'exec/cpu_ldst.h' headerPhilippe Mathieu-Daudé1-0/+1
2024-04-25hw, target: Add ResetType argument to hold and exit phase methodsPeter Maydell1-2/+2
2024-03-12target/hexagon: Prefer fast cpu_env() over slower CPU QOM cast macroPhilippe Mathieu-Daudé2-23/+8
2024-03-12target: Replace CPU_GET_CLASS(cpu -> obj) in cpu_reset_hold() handlerPhilippe Mathieu-Daudé1-1/+1
2024-02-28gdbstub: Infer number of core registers from XMLAkihiko Odaki1-1/+0
2024-02-28gdbstub: Change gdb_get_reg_cb and gdb_set_reg_cbAkihiko Odaki2-4/+10
2024-02-28gdbstub: Use GDBFeature for gdb_register_coprocessorAkihiko Odaki1-2/+1
2024-02-21hexagon: correct typosManos Pitsidianakis1-1/+1
2024-02-03include/exec: Implement cpu_mmu_index genericallyRichard Henderson1-9/+0
2024-01-29include/qemu: Add TCGCPUOps typedef to typedefs.hRichard Henderson1-1/+1
2024-01-29include/exec: Use vaddr in DisasContextBase for virtual addressesAnton Johansson1-1/+2
2024-01-29target: Use vaddr in gen_intermediate_codeAnton Johansson1-1/+1
2024-01-21target/hexagon: reduce scope of def_regnum, remove dead assignmentBrian Cain1-3/+1
2024-01-21Hexagon (target/hexagon) Remove old dectree.pyTaylor Simpson6-839/+0