| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-06-21 | target/arm: Implement MVE VMULL | Peter Maydell | 4 | -0/+57 |
| 2021-06-21 | target/arm: Implement MVE VHADD, VHSUB | Peter Maydell | 4 | -0/+48 |
| 2021-06-21 | target/arm: Implement MVE VABD | Peter Maydell | 4 | -0/+17 |
| 2021-06-21 | target/arm: Implement MVE VMAX, VMIN | Peter Maydell | 4 | -0/+37 |
| 2021-06-21 | target/arm: Implement MVE VRMULH | Peter Maydell | 4 | -0/+34 |
| 2021-06-21 | target/arm: Implement MVE VMULH | Peter Maydell | 4 | -0/+38 |
| 2021-06-21 | target/arm: Implement MVE VADD, VSUB, VMUL | Peter Maydell | 4 | -0/+47 |
| 2021-06-21 | target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR | Peter Maydell | 4 | -0/+78 |
| 2021-06-21 | target/arm: Implement MVE VDUP | Peter Maydell | 4 | -0/+55 |
| 2021-06-21 | target/arm: Implement MVE VNEG | Peter Maydell | 4 | -0/+35 |
| 2021-06-21 | target/arm: Implement MVE VABS | Peter Maydell | 4 | -0/+37 |
| 2021-06-21 | target/arm: Implement MVE VMVN (register) | Peter Maydell | 4 | -0/+14 |
| 2021-06-21 | target/arm: Implement MVE VREV16, VREV32, VREV64 | Peter Maydell | 4 | -0/+51 |
| 2021-06-21 | target/arm: Implement MVE VCLS | Peter Maydell | 4 | -0/+13 |
| 2021-06-21 | target/arm: Implement MVE VCLZ | Peter Maydell | 4 | -0/+132 |
| 2021-06-21 | target/arm: Implement widening/narrowing MVE VLDR/VSTR insns | Peter Maydell | 4 | -2/+58 |
| 2021-06-21 | target/arm: Implement MVE VLDR/VSTR (non-widening forms) | Peter Maydell | 7 | -0/+351 |
| 2021-06-21 | target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m() | Peter Maydell | 3 | -14/+11 |
| 2021-06-21 | target/arm: Split vfp_access_check() into A and M versions | Peter Maydell | 1 | -30/+47 |
| 2021-06-21 | target/arm: Factor FP context update code out into helper function | Peter Maydell | 1 | -46/+58 |
| 2021-06-21 | target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access | Peter Maydell | 1 | -30/+72 |
| 2021-06-21 | target/arm: Don't NOCP fault for FPCXT_NS accesses | Peter Maydell | 5 | -528/+542 |
| 2021-06-21 | target/arm: Handle FPU being disabled in FPCXT_NS accesses | Peter Maydell | 1 | -2/+30 |
| 2021-06-21 | target/arm/translate-vfp.c: Whitespace fixes | Peter Maydell | 1 | -6/+5 |
| 2021-06-21 | target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors | Peter Maydell | 1 | -5/+1 |
| 2021-06-16 | bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations | Peter Maydell | 1 | -20/+0 |
| 2021-06-16 | target/arm: Move expand_pred_b() data to vec_helper.c | Peter Maydell | 3 | -99/+109 |
| 2021-06-16 | target/arm: Add framework for MVE decode | Peter Maydell | 5 | -0/+53 |
| 2021-06-16 | target/arm: Implement MVE LETP insn | Peter Maydell | 2 | -9/+97 |
| 2021-06-16 | target/arm: Implement MVE DLSTP | Peter Maydell | 2 | -5/+27 |
| 2021-06-16 | target/arm: Implement MVE WLSTP insn | Peter Maydell | 2 | -3/+42 |
| 2021-06-16 | target/arm: Implement MVE LCTP | Peter Maydell | 2 | -0/+26 |
| 2021-06-16 | target/arm: Let vfp_access_check() handle late NOCP checks | Peter Maydell | 1 | -5/+15 |
| 2021-06-16 | target/arm: Add handling for PSR.ECI/ICI | Peter Maydell | 5 | -5/+133 |
| 2021-06-16 | target/arm: Handle VPR semantics in existing code | Peter Maydell | 3 | -11/+57 |
| 2021-06-16 | target/arm: Enable FPSCR.QC bit for MVE | Peter Maydell | 2 | -10/+23 |
| 2021-06-16 | target/arm: Provide and use H8 and H1_8 macros | Peter Maydell | 3 | -137/+143 |
| 2021-06-16 | target/arm: Fix mte page crossing test | Richard Henderson | 1 | -1/+1 |
| 2021-06-15 | target/arm: Diagnose UNALLOCATED in disas_simd_three_reg_same_fp16 | Richard Henderson | 1 | -30/+48 |
| 2021-06-15 | target/arm: Remove fprintf from disas_simd_mod_imm | Richard Henderson | 1 | -1/+0 |
| 2021-06-15 | target/arm: Diagnose UNALLOCATED in disas_simd_two_reg_misc_fp16 | Richard Henderson | 1 | -2/+2 |
| 2021-06-03 | target/arm: Enable BFloat16 extensions | Richard Henderson | 3 | -0/+7 |
| 2021-06-03 | target/arm: Implement bfloat widening fma (indexed) | Richard Henderson | 7 | -1/+82 |
| 2021-06-03 | target/arm: Implement bfloat widening fma (vector) | Richard Henderson | 7 | -4/+73 |
| 2021-06-03 | target/arm: Implement bfloat16 matrix multiply accumulate | Richard Henderson | 7 | -3/+81 |
| 2021-06-03 | target/arm: Implement bfloat16 dot product (indexed) | Richard Henderson | 7 | -9/+80 |
| 2021-06-03 | target/arm: Implement bfloat16 dot product (vector) | Richard Henderson | 7 | -0/+89 |
| 2021-06-03 | target/arm: Implement vector float32 to bfloat16 conversion | Richard Henderson | 9 | -0/+95 |
| 2021-06-03 | target/arm: Implement scalar float32 to bfloat16 conversion | Richard Henderson | 5 | -0/+51 |
| 2021-06-03 | target/arm: Unify unallocated path in disas_fp_1src | Richard Henderson | 1 | -9/+6 |
