aboutsummaryrefslogtreecommitdiff
path: root/target/arm/translate.c
AgeCommit message (Expand)AuthorFilesLines
2021-09-21target/arm: Add TB flag for "MVE insns not predicated"Peter Maydell1-0/+8
2021-09-21target/arm: Avoid goto_tb if we're trying to exit to the main loopPeter Maydell1-1/+33
2021-09-14accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich1-4/+5
2021-09-13target/arm: Take an exception if PSTATE.IL is setPeter Maydell1-0/+21
2021-08-26target/arm: Implement HSTR.TJDBXPeter Maydell1-0/+12
2021-08-25target/arm: Implement M-profile trapping on division by zeroPeter Maydell1-2/+2
2021-08-25target/arm: Implement MVE VCTPPeter Maydell1-0/+33
2021-07-27target/arm: Enforce that M-profile SP low 2 bits are always zeroPeter Maydell1-0/+3
2021-07-21accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson1-29/+0
2021-07-09target/arm: Use translator_use_goto_tb for aarch32Richard Henderson1-11/+1
2021-07-09target/arm: Use DISAS_TOO_MANY for ISB and SBRichard Henderson1-2/+2
2021-07-09tcg: Avoid including 'trace-tcg.h' in target translate.cPhilippe Mathieu-Daudé1-1/+0
2021-07-02target/arm: Implement MVE shifts by registerPeter Maydell1-0/+30
2021-07-02target/arm: Implement MVE shifts by immediatePeter Maydell1-2/+66
2021-07-02target/arm: Implement MVE long shifts by registerPeter Maydell1-0/+69
2021-07-02target/arm: Implement MVE long shifts by immediatePeter Maydell1-0/+90
2021-07-02target/arm: Use asimd_imm_const for A64 decodePeter Maydell1-2/+15
2021-07-02target/arm: Make asimd_imm_const() publicPeter Maydell1-0/+57
2021-06-29target/arm: Improve REVSHRichard Henderson1-3/+1
2021-06-29tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64Richard Henderson1-1/+1
2021-06-16target/arm: Add framework for MVE decodePeter Maydell1-0/+1
2021-06-16target/arm: Implement MVE LETP insnPeter Maydell1-8/+96
2021-06-16target/arm: Implement MVE DLSTPPeter Maydell1-2/+21
2021-06-16target/arm: Implement MVE WLSTP insnPeter Maydell1-1/+36
2021-06-16target/arm: Implement MVE LCTPPeter Maydell1-0/+24
2021-06-16target/arm: Add handling for PSR.ECI/ICIPeter Maydell1-5/+106
2021-05-20target/arm: Make sure that commpage's tb->size != 0Ilya Leoshkevich1-0/+2
2021-05-10target/arm: Make translate-neon.c.inc its own compilation unitPeter Maydell1-3/+0
2021-05-10target/arm: Make functions used by translate-neon globalPeter Maydell1-8/+2
2021-05-10target/arm: Move NeonGenThreeOpEnvFn typedef to translate.hPeter Maydell1-3/+0
2021-05-10target/arm: Delete unused typedefPeter Maydell1-2/+0
2021-05-10target/arm: Move vfp_reg_ptr() to translate-neon.c.incPeter Maydell1-7/+0
2021-05-10target/arm: Make translate-vfp.c.inc its own compilation unitPeter Maydell1-2/+1
2021-05-10target/arm: Make functions used by translate-vfp globalPeter Maydell1-17/+8
2021-05-10target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.incPeter Maydell1-20/+0
2021-05-10target/arm: Move gen_aa32 functions to translate-a32.hPeter Maydell1-35/+16
2021-05-10target/arm: Split m-nocp trans functions into their own filePeter Maydell1-1/+0
2021-05-10target/arm: Make functions used by m-nocp globalPeter Maydell1-32/+7
2021-05-10target/arm: Share unallocated_encoding() and gen_exception_insn()Peter Maydell1-5/+9
2021-05-10target/arm: Move constant expanders to translate.hPeter Maydell1-24/+0
2021-04-30target/arm: Enforce alignment for VLDn (all lanes)Richard Henderson1-0/+15
2021-04-30target/arm: Enforce alignment for SRSRichard Henderson1-2/+2
2021-04-30target/arm: Enforce alignment for RFERichard Henderson1-2/+2
2021-04-30target/arm: Enforce alignment for LDM/STMRichard Henderson1-2/+2
2021-04-30target/arm: Enforce alignment for LDA/LDAH/STL/STLHRichard Henderson1-2/+2
2021-04-30target/arm: Enforce word alignment for LDRD/STRDRichard Henderson1-8/+8
2021-04-30target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endiannessRichard Henderson1-33/+45
2021-04-30target/arm: Fix SCTLR_B test for TCGv_i64 load/storeRichard Henderson1-2/+2
2021-04-30target/arm: Merge gen_aa32_frob64 into gen_aa32_ld_i64Richard Henderson1-20/+15
2021-04-30target/arm: Adjust gen_aa32_{ld, st}_i32 for align+endiannessRichard Henderson1-46/+50
generated by cgit v1.1 at 2024-11-02 23:45:43 +0000