aboutsummaryrefslogtreecommitdiff
path: root/target/arm/translate-vfp.inc.c
AgeCommit message (Expand)AuthorFilesLines
2019-06-18target/arm: Check for dp support for dp VFM, not spPeter Maydell1-4/+4
2019-06-17target/arm: Only implement doubles if the FPU supports themPeter Maydell1-0/+84
2019-06-17target/arm: Fix typos in trans function prototypesPeter Maydell1-14/+14
2019-06-17target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_immPeter Maydell1-24/+4
2019-06-17target/arm: Move vfp_expand_imm() to translate.[ch]Peter Maydell1-0/+33
2019-06-13target/arm: Fix short-vector increment behaviourPeter Maydell1-40/+60
2019-06-13target/arm: Convert float-to-integer VCVT insns to decodetreePeter Maydell1-0/+72
2019-06-13target/arm: Convert VCVT fp/fixed-point conversion insns to decodetreePeter Maydell1-0/+124
2019-06-13target/arm: Convert VJCVT to decodetreePeter Maydell1-0/+28
2019-06-13target/arm: Convert integer-to-float insns to decodetreePeter Maydell1-0/+58
2019-06-13target/arm: Convert double-single precision conversion insns to decodetreePeter Maydell1-0/+48
2019-06-13target/arm: Convert VFP round insns to decodetreePeter Maydell1-0/+163
2019-06-13target/arm: Convert the VCVT-to-f16 insns to decodetreePeter Maydell1-0/+62
2019-06-13target/arm: Convert the VCVT-from-f16 insns to decodetreePeter Maydell1-0/+82
2019-06-13target/arm: Convert VFP comparison insns to decodetreePeter Maydell1-0/+75
2019-06-13target/arm: Convert VMOV (register) to decodetreePeter Maydell1-0/+10
2019-06-13target/arm: Convert VSQRT to decodetreePeter Maydell1-0/+20
2019-06-13target/arm: Convert VNEG to decodetreePeter Maydell1-0/+10
2019-06-13target/arm: Convert VABS to decodetreePeter Maydell1-0/+167
2019-06-13target/arm: Convert VMOV (imm) to decodetreePeter Maydell1-0/+129
2019-06-13target/arm: Convert VFP fused multiply-add insns to decodetreePeter Maydell1-0/+121
2019-06-13target/arm: Convert VDIV to decodetreePeter Maydell1-0/+10
2019-06-13target/arm: Convert VSUB to decodetreePeter Maydell1-0/+10
2019-06-13target/arm: Convert VADD to decodetreePeter Maydell1-0/+10
2019-06-13target/arm: Convert VNMUL to decodetreePeter Maydell1-0/+24
2019-06-13target/arm: Convert VMUL to decodetreePeter Maydell1-0/+10
2019-06-13target/arm: Convert VFP VNMLA to decodetreePeter Maydell1-0/+34
2019-06-13target/arm: Convert VFP VNMLS to decodetreePeter Maydell1-0/+42
2019-06-13target/arm: Convert VFP VMLS to decodetreePeter Maydell1-0/+38
2019-06-13target/arm: Convert VFP VMLA to decodetreePeter Maydell1-0/+205
2019-06-13target/arm: Remove VLDR/VSTR/VLDM/VSTM use of cpu_F0s and cpu_F0dPeter Maydell1-18/+28
2019-06-13target/arm: Convert the VFP load/store multiple insns to decodetreePeter Maydell1-0/+162
2019-06-13target/arm: Convert VFP VLDR and VSTR to decodetreePeter Maydell1-0/+73
2019-06-13target/arm: Convert VFP two-register transfer insns to decodetreePeter Maydell1-0/+70
2019-06-13target/arm: Convert "single-precision" register moves to decodetreePeter Maydell1-0/+161
2019-06-13target/arm: Convert "double-precision" register moves to decodetreePeter Maydell1-0/+147
2019-06-13target/arm: Add helpers for VFP register loads and storesPeter Maydell1-20/+20
2019-06-13target/arm: Move the VFP trans_* functions to translate-vfp.inc.cPeter Maydell1-0/+337
2019-06-13target/arm: Convert the VSEL instructions to decodetreePeter Maydell1-0/+9
2019-06-13target/arm: Factor out VFP access checking codePeter Maydell1-0/+100
2019-06-13target/arm: Add stubs for AArch32 VFP decodetreePeter Maydell1-0/+31