riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-09-03	tcg: TCGMemOp is now accelerator independent MemOp	Tony Nguyen	1	-1/+1
2019-05-13	tcg: Specify optional vector requirements with a list	Richard Henderson	1	-4/+5
2019-05-06	decodetree: Add DisasContext argument to !function expanders	Richard Henderson	1	-12/+12
2019-03-15	target/arm: Check access permission to ADDVL/ADDPL/RDVL	Amir Charif	1	-8/+14
2019-02-15	target/arm: Rely on optimization within tcg_gen_gvec_or	Richard Henderson	1	-5/+1
2018-10-31	decodetree: Remove "insn" argument from trans_* expanders	Richard Henderson	1	-263/+244
2018-10-08	target/arm: Pass TCGMemOpIdx to sve memory helpers	Richard Henderson	1	-23/+44
2018-10-08	target/arm: Rewrite vector gather first-fault loads	Richard Henderson	1	-42/+42
2018-10-08	target/arm: Rewrite vector gather stores	Richard Henderson	1	-25/+49
2018-10-08	target/arm: Rewrite vector gather loads	Richard Henderson	1	-81/+167
2018-10-08	target/arm: Split contiguous stores for endianness	Richard Henderson	1	-17/+55
2018-10-08	target/arm: Split contiguous loads for endianness	Richard Henderson	1	-71/+143
2018-10-08	target/arm: Clear unused predicate bits for LD1RQ	Richard Henderson	1	-1/+22
2018-08-16	target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half	Richard Henderson	1	-2/+2
2018-08-16	target/arm: Fix offset scaling for LD_zprr and ST_zprr	Richard Henderson	1	-3/+2
2018-08-16	target/arm: Fix offset for LD1R instructions	Richard Henderson	1	-1/+2
2018-08-16	target/arm: Fix sign-extension in sve do_ldr/do_str	Richard Henderson	1	-10/+8
2018-08-14	target/arm: Reorganize SVE WHILE	Richard Henderson	1	-17/+32
2018-08-14	target/arm: Fix typo in do_sat_addsub_64	Richard Henderson	1	-1/+1
2018-07-09	target/arm: Fix do_predset for large VL	Richard Henderson	1	-8/+2
2018-07-09	target/arm: Suppress Coverity warning for PRF	Richard Henderson	1	-2/+2
2018-06-29	target/arm: Implement SVE dot product (indexed)	Richard Henderson	1	-0/+18
2018-06-29	target/arm: Implement SVE dot product (vectors)	Richard Henderson	1	-0/+17
2018-06-29	target/arm: Implement SVE fp complex multiply add (indexed)	Richard Henderson	1	-0/+23
2018-06-29	target/arm: Implement SVE fp complex multiply add	Richard Henderson	1	-0/+37
2018-06-29	target/arm: Implement SVE floating-point complex add	Richard Henderson	1	-0/+24
2018-06-29	target/arm: Implement SVE MOVPRFX	Richard Henderson	1	-1/+59
2018-06-29	target/arm: Implement SVE floating-point unary operations	Richard Henderson	1	-0/+26
2018-06-29	target/arm: Implement SVE floating-point round to integral value	Richard Henderson	1	-0/+77
2018-06-29	target/arm: Implement SVE floating-point convert to integer	Richard Henderson	1	-0/+70
2018-06-29	target/arm: Implement SVE floating-point convert precision	Richard Henderson	1	-0/+30
2018-06-29	target/arm: Implement SVE floating-point trig multiply-add coefficient	Richard Henderson	1	-0/+27
2018-06-29	target/arm: Implement SVE FP Compare with Zero Group	Richard Henderson	1	-0/+43
2018-06-29	target/arm: Implement SVE Floating Point Unary Operations - Unpredicated Group	Richard Henderson	1	-0/+47
2018-06-29	target/arm: Implement SVE FP Fast Reduction Group	Richard Henderson	1	-0/+57
2018-06-29	target/arm: Implement SVE Floating Point Multiply Indexed Group	Richard Henderson	1	-0/+50
2018-06-29	target/arm: Implement SVE floating-point arithmetic with immediate	Richard Henderson	1	-0/+75
2018-06-29	target/arm: Implement SVE floating-point compare vectors	Richard Henderson	1	-0/+40
2018-06-29	target/arm: Implement SVE scatter store vector immediate	Richard Henderson	1	-26/+59
2018-06-29	target/arm: Implement SVE first-fault gather loads	Richard Henderson	1	-2/+38
2018-06-29	target/arm: Implement SVE gather loads	Richard Henderson	1	-0/+100
2018-06-29	target/arm: Implement SVE prefetches	Richard Henderson	1	-0/+21
2018-06-29	target/arm: Implement SVE scatter stores	Richard Henderson	1	-0/+75
2018-06-29	target/arm: Implement SVE store vector/predicate register	Richard Henderson	1	-0/+103
2018-06-29	target/arm: Implement SVE load and broadcast element	Richard Henderson	1	-0/+62
2018-06-29	target/arm: Implement SVE Floating Point Accumulating Reduction Group	Richard Henderson	1	-0/+45
2018-06-29	target/arm: Implement SVE FP Multiply-Add Group	Richard Henderson	1	-0/+49
2018-06-29	target/arm: Implement SVE floating-point arithmetic (predicated)	Richard Henderson	1	-0/+46
2018-06-29	target/arm: Implement SVE integer convert to floating-point	Richard Henderson	1	-0/+90
2018-06-29	target/arm: Implement SVE load and broadcast quadword	Richard Henderson	1	-0/+52