riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-05-25	target/arm: Implement SVE2 XAR	Richard Henderson	1	-0/+3
2021-05-10	target/arm: Share unallocated_encoding() and gen_exception_insn()	Peter Maydell	1	-2/+0
2021-04-30	target/arm: Remove log2_esize parameter to gen_mte_checkN	Richard Henderson	1	-1/+1
2020-11-15	arm tcg cpus: Fix Lesser GPL version number	Chetan Pant	1	-1/+1
2020-08-24	target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr()	Peter Maydell	1	-1/+0
2020-07-03	target/arm: Fix temp double-free in sve ldr/str	Richard Henderson	1	-0/+1
2020-06-26	target/arm: Handle TBI for sve scalar + int memory ops	Richard Henderson	1	-0/+1
2020-06-26	target/arm: Add gen_mte_checkN	Richard Henderson	1	-0/+2
2020-06-26	target/arm: Add gen_mte_check1	Richard Henderson	1	-0/+2
2020-06-05	target/arm: Convert rax1 to gvec helpers	Richard Henderson	1	-0/+3
2020-05-04	target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree	Peter Maydell	1	-9/+0
2019-09-04	Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into staging	Peter Maydell	1	-1/+1
2019-09-03	tcg: TCGMemOp is now accelerator independent MemOp	Tony Nguyen	1	-1/+1
2019-09-03	Revert "target/arm: Use unallocated_encoding for aarch32"	Richard Henderson	1	-0/+2
2019-08-16	target/arm: Use unallocated_encoding for aarch32	Richard Henderson	1	-2/+0
2019-08-16	target/arm: Introduce pc_curr	Richard Henderson	1	-1/+1
2019-06-17	target/arm: Move vfp_expand_imm() to translate.[ch]	Peter Maydell	1	-1/+0
2019-06-13	target/arm: Use tcg_gen_gvec_bitsel	Richard Henderson	1	-0/+2
2018-06-15	target/arm: Extend vec_reg_offset to larger sizes	Richard Henderson	1	-9/+17
2018-05-18	target/arm: Introduce translate-a64.h	Richard Henderson	1	-0/+118