riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2018-11-06	target/arm: Remove can't-happen if() from handle_vec_simd_shli()	Peter Maydell	1	-5/+3
2018-10-24	target/arm: Use gvec for NEON_3R_VTST_VCEQ, NEON_3R_VCGT, NEON_3R_VCGE	Richard Henderson	1	-38/+0
2018-10-24	target/arm: Use gvec for NEON_3R_VML	Richard Henderson	1	-106/+0
2018-10-24	target/arm: Use gvec for VSRI, VSLI	Richard Henderson	1	-151/+1
2018-10-24	target/arm: Use gvec for VSRA	Richard Henderson	1	-106/+0
2018-10-24	target/arm: Use gvec for NEON_3R_LOGIC insns	Richard Henderson	1	-61/+0
2018-10-24	target/arm: Promote consecutive memory ops for aa64	Richard Henderson	1	-26/+40
2018-10-24	target/arm: Use tcg_gen_gvec_dup_i64 for LD[1-4]R	Richard Henderson	1	-25/+3
2018-10-24	target/arm: Don't call tcg_clear_temp_count	Richard Henderson	1	-1/+0
2018-10-24	target/arm: Hoist address increment for vector memory ops	Richard Henderson	1	-4/+8
2018-10-24	target/arm: Convert v8.2-fp16 from feature bit to aa64pfr0 test	Richard Henderson	1	-20/+20
2018-10-24	target/arm: Convert sve from feature bit to aa64pfr0 test	Richard Henderson	1	-2/+2
2018-10-24	target/arm: Convert v8 extensions from feature bits to isar tests	Richard Henderson	1	-51/+50
2018-10-18	target/arm: Check HAVE_CMPXCHG128 at translate time	Richard Henderson	1	-16/+22
2018-10-08	target/arm: Adjust aarch64_cpu_dump_state for system mode SVE	Richard Henderson	1	-2/+6
2018-08-16	target/arm: Fix aa64 FCADD and FCMLA decode	Richard Henderson	1	-6/+6
2018-08-16	target/arm: Dump SVE state if enabled	Richard Henderson	1	-11/+82
2018-08-16	target/arm: Reformat integer register dump	Richard Henderson	1	-7/+6
2018-06-29	target/arm: Fix SVE system register access checks	Richard Henderson	1	-3/+2
2018-06-29	target/arm: Implement ARMv8.2-DotProd	Richard Henderson	1	-0/+36
2018-06-29	target/arm: Pass index to AdvSIMD FCMLA (indexed)	Richard Henderson	1	-9/+12
2018-06-01	tcg: Pass tb and index to tcg_gen_exit_tb separately	Richard Henderson	1	-3/+3
2018-05-18	target/arm: Add SVE decode skeleton	Richard Henderson	1	-1/+6
2018-05-18	target/arm: Introduce translate-a64.h	Richard Henderson	1	-97/+15
2018-05-17	target/arm: convert conversion helpers to fpst/ahp_flag	Alex Bennée	1	-7/+30
2018-05-15	target/arm: Fix sqrt_f16 exception raising	Alex Bennée	1	-1/+2
2018-05-15	target/arm: Implement FMOV (immediate) for fp16	Alex Bennée	1	-3/+17
2018-05-15	target/arm: Implement FCSEL for fp16	Alex Bennée	1	-6/+25
2018-05-15	target/arm: Implement FCMP for fp16	Alex Bennée	1	-17/+71
2018-05-15	target/arm: Implement FP data-processing (3 source) for fp16	Richard Henderson	1	-0/+48
2018-05-15	target/arm: Implement FP data-processing (2 source) for fp16	Richard Henderson	1	-0/+65
2018-05-15	target/arm: Introduce and use read_fp_hreg	Richard Henderson	1	-16/+14
2018-05-15	target/arm: Implement FCVT (scalar, fixed-point) for fp16	Richard Henderson	1	-2/+15
2018-05-15	target/arm: Implement FCVT (scalar, integer) for fp16	Richard Henderson	1	-16/+80
2018-05-15	target/arm: Early exit after unallocated_encoding in disas_fp_int_conv	Richard Henderson	1	-1/+1
2018-05-15	target/arm: Implement FMOV (general) for fp16	Richard Henderson	1	-0/+21
2018-05-11	Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180510'...	Peter Maydell	1	-118/+364
2018-05-10	target/arm: Clear SVE high bits for FMOV	Richard Henderson	1	-12/+5
2018-05-10	target/arm: Fix float16 to/from int16	Richard Henderson	1	-2/+2
2018-05-10	target/arm: Implement vector shifted FCVT for fp16	Richard Henderson	1	-18/+45
2018-05-10	target/arm: Implement vector shifted SCVF/UCVF for fp16	Richard Henderson	1	-13/+20
2018-05-10	target/arm: Implement CAS and CASP	Richard Henderson	1	-3/+116
2018-05-10	target/arm: Fill in disas_ldst_atomic	Richard Henderson	1	-2/+36
2018-05-10	target/arm: Introduce ARM_FEATURE_V8_ATOMICS and initial decode	Richard Henderson	1	-43/+133
2018-05-10	target/arm: Use new min/max expanders	Richard Henderson	1	-32/+14
2018-05-09	translator: merge max_insns into DisasContextBase	Emilio G. Cota	1	-5/+3
2018-05-04	target/arm: Tidy condition in disas_simd_two_reg_misc	Richard Henderson	1	-1/+5
2018-05-04	target/arm: Tidy conditions in handle_vec_simd_shri	Richard Henderson	1	-5/+1
2018-04-26	target/arm: Allow EL change hooks to do IO	Aaron Lindsay	1	-0/+6
2018-03-23	target/arm: Honour MDCR_EL2.TDE when routing exceptions due to BKPT/BRK	Peter Maydell	1	-2/+13