riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-04-30	target/arm: Restrict translation disabled alignment check to VMSA	Richard Henderson	1	-2/+10
2024-03-05	target/arm: Do memory type alignment check when translation disabled	Richard Henderson	1	-2/+32
2024-01-09	target/arm: Implement FEAT_NV2 redirection of sysregs to RAM	Peter Maydell	1	-0/+6
2024-01-09	target/arm: Handle FEAT_NV2 redirection of SPSR_EL2, ELR_EL2, ESR_EL2, FAR_EL2	Peter Maydell	1	-0/+6
2024-01-09	target/arm: Treat LDTR* and STTR* as LDR/STR when NV, NV1 is 1, 1	Peter Maydell	1	-2/+4
2024-01-09	target/arm: Trap sysreg accesses for FEAT_NV	Peter Maydell	1	-0/+1
2024-01-09	target/arm: Enable trapping of ERET for FEAT_NV	Peter Maydell	1	-1/+10
2023-11-15	target/arm/tcg: spelling fixes: alse, addreses	Michael Tokarev	1	-1/+1
2023-10-27	target/arm: Move feature test functions to their own header	Peter Maydell	1	-0/+1
2023-09-21	target/arm: Define new TB flag for ATA0	Peter Maydell	1	-0/+12
2023-09-21	target/arm: Don't skip MTE checks for LDRT/STRT at EL0	Peter Maydell	1	-0/+9
2023-06-06	target/arm: Add SCTLR.nAA to TBFLAG_A64	Richard Henderson	1	-0/+6
2023-02-27	target/arm: Move hflags code into the tcg directory	Fabiano Rosas	1	-0/+403