riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-02-27	target/arm: move translate modules to tcg/	Fabiano Rosas	1	-1702/+0
2022-07-11	target/arm: Implement SCLAMP, UCLAMP	Richard Henderson	1	-0/+5
2022-07-11	target/arm: Implement REVD	Richard Henderson	1	-0/+1
2022-07-11	target/arm: Implement PSEL	Richard Henderson	1	-0/+20
2022-07-11	target/arm: Implement SME RDSVL, ADDSVL, ADDSPL	Richard Henderson	1	-1/+4
2022-07-11	target/arm: Mark gather prefetch as non-streaming	Richard Henderson	1	-5/+5
2022-05-30	target/arm: Use TRANS_FEAT for FMMLA	Richard Henderson	1	-4/+3
2022-05-30	target/arm: Reject copy w/ shifted byte early	Richard Henderson	1	-2/+8
2022-05-30	target/arm: Reject add/sub w/ shifted byte early	Richard Henderson	1	-7/+28
2022-05-30	target/arm: Reject dup_i w/ shifted byte early	Richard Henderson	1	-1/+4
2022-03-18	target/arm: Fix sve2 ldnt1 and stnt1	Richard Henderson	1	-3/+2
2021-07-18	target/arm: Remove duplicate 'plus1' function from Neon and SVE decode	Peter Maydell	1	-1/+1
2021-06-03	target/arm: Implement bfloat widening fma (indexed)	Richard Henderson	1	-0/+2
2021-06-03	target/arm: Implement bfloat widening fma (vector)	Richard Henderson	1	-0/+3
2021-06-03	target/arm: Implement bfloat16 matrix multiply accumulate	Richard Henderson	1	-2/+4
2021-06-03	target/arm: Implement bfloat16 dot product (indexed)	Richard Henderson	1	-0/+3
2021-06-03	target/arm: Implement bfloat16 dot product (vector)	Richard Henderson	1	-0/+3
2021-06-03	target/arm: Implement vector float32 to bfloat16 conversion	Richard Henderson	1	-0/+2
2021-05-25	target/arm: Implement integer matrix multiply accumulate	Richard Henderson	1	-0/+6
2021-05-25	target/arm: Implement SVE2 fp multiply-add long	Stephen Long	1	-0/+14
2021-05-25	target/arm: Implement SVE2 bitwise shift immediate	Stephen Long	1	-0/+5
2021-05-25	target/arm: Implement 128-bit ZIP, UZP, TRN	Richard Henderson	1	-0/+8
2021-05-25	target/arm: Implement SVE2 LD1RO	Richard Henderson	1	-0/+4
2021-05-25	target/arm: Implement SVE2 FLOGB	Stephen Long	1	-0/+3
2021-05-25	target/arm: Implement SVE2 FCVTXNT, FCVTX	Stephen Long	1	-0/+2
2021-05-25	target/arm: Implement SVE2 FCVTLT	Stephen Long	1	-0/+2
2021-05-25	target/arm: Implement SVE2 FCVTNT	Richard Henderson	1	-0/+4
2021-05-25	target/arm: Implement SVE2 TBL, TBX	Stephen Long	1	-0/+5
2021-05-25	target/arm: Implement SVE2 crypto constructive binary operations	Richard Henderson	1	-0/+4
2021-05-25	target/arm: Implement SVE2 crypto destructive binary operations	Richard Henderson	1	-0/+7
2021-05-25	target/arm: Implement SVE2 crypto unary operations	Richard Henderson	1	-0/+6
2021-05-25	target/arm: Implement SVE mixed sign dot product	Richard Henderson	1	-0/+4
2021-05-25	target/arm: Implement SVE mixed sign dot product (indexed)	Richard Henderson	1	-0/+4
2021-05-25	target/arm: Implement SVE2 complex integer dot product	Richard Henderson	1	-0/+9
2021-05-25	target/arm: Implement SVE2 complex integer multiply-add (indexed)	Richard Henderson	1	-0/+12
2021-05-25	target/arm: Implement SVE2 integer multiply long (indexed)	Richard Henderson	1	-0/+10
2021-05-25	target/arm: Implement SVE2 multiply-add long (indexed)	Richard Henderson	1	-0/+18
2021-05-25	target/arm: Implement SVE2 saturating multiply high (indexed)	Richard Henderson	1	-0/+8
2021-05-25	target/arm: Implement SVE2 signed saturating doubling multiply high	Richard Henderson	1	-0/+4
2021-05-25	target/arm: Implement SVE2 saturating multiply (indexed)	Richard Henderson	1	-0/+12
2021-05-25	target/arm: Implement SVE2 saturating multiply-add (indexed)	Richard Henderson	1	-0/+18
2021-05-25	target/arm: Implement SVE2 saturating multiply-add high (indexed)	Richard Henderson	1	-0/+8
2021-05-25	target/arm: Implement SVE2 integer multiply-add (indexed)	Richard Henderson	1	-0/+8
2021-05-25	target/arm: Implement SVE2 integer multiply (indexed)	Richard Henderson	1	-0/+7
2021-05-25	target/arm: Split out formats for 3 vectors + 1 index	Richard Henderson	1	-10/+19
2021-05-25	target/arm: Split out formats for 2 vectors + 1 index	Richard Henderson	1	-4/+10
2021-05-25	target/arm: Pass separate addend to {U, S}DOT helpers	Richard Henderson	1	-3/+4
2021-05-25	target/arm: Implement SVE2 SPLICE, EXT	Stephen Long	1	-2/+9
2021-05-25	target/arm: Implement SVE2 FMMLA	Stephen Long	1	-0/+4
2021-05-25	target/arm: Implement SVE2 gather load insns	Stephen Long	1	-0/+11