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path: root/target/arm/helper.c
AgeCommit message (Expand)AuthorFilesLines
2017-04-20arm: Move excnames[] array into arm_log_exceptions()Peter Maydell1-0/+19
2017-03-20arm: Fix APSR writes via M profile MSRPeter Maydell1-4/+22
2017-03-14target/arm: implement armv8 PMUSERENR (user-mode enable bits)Andrew Baumann1-8/+71
2017-03-09target/arm/helper: make it clear the EC field is also in hexAlex Bennée1-1/+1
2017-02-28armv7m: Raise correct kind of UsageFault for attempts to execute ARM codePeter Maydell1-0/+4
2017-02-28armv7m: Check exception return consistencyPeter Maydell1-11/+101
2017-02-28armv7m: Extract "exception taken" code into functionsPeter Maydell1-50/+68
2017-02-28armv7m: Simpler and faster exception startMichael Davidsaver1-6/+9
2017-02-28armv7m: Remove unused armv7m_nvic_acknowledge_irq() return valuePeter Maydell1-1/+1
2017-02-28armv7m: Escalate exceptions to HardFault if necessaryMichael Davidsaver1-2/+0
2017-02-24target-arm: ensure all cross vCPUs TLB flushes completeAlex Bennée1-96/+69
2017-02-24cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmapAlex Bennée1-44/+72
2017-02-24tcg: drop global lock during TCG code executionJan Kiszka1-0/+6
2017-02-10target-arm: Enable vPMU support under TCG modeWei Huang1-6/+1
2017-02-10target-arm: Add support for PMU register PMINTENSET_EL1Wei Huang1-1/+9
2017-02-10target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0Wei Huang1-5/+25
2017-02-10target-arm: Add support for PMU register PMSELR_EL0Wei Huang1-6/+21
2017-01-27armv7m: Report no-coprocessor faults correctlyPeter Maydell1-0/+4
2017-01-27armv7m: set CFSR.UNDEFINSTR on undefined instructionsMichael Davidsaver1-0/+1
2017-01-27armv7m: honour CCR.STACKALIGN on exception entryMichael Davidsaver1-4/+2
2017-01-27target/arm: Drop IS_M() macroPeter Maydell1-1/+1
2017-01-27armv7m: Clear FAULTMASK on return from non-NMI exceptionsMichael Davidsaver1-1/+6
2017-01-27armv7m: Fix reads of CONTROL register bit 1Michael Davidsaver1-12/+23
2017-01-27armv7m: Explicit error for bad vector tableMichael Davidsaver1-1/+25
2017-01-27armv7m: MRS/MSR: handle unprivileged accessMichael Davidsaver1-42/+37
2017-01-20target/arm: Implement DBGVCR32_EL2 system registerPeter Maydell1-0/+7
2017-01-20target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32()Peter Maydell1-0/+14
2017-01-16Merge remote-tracking branch 'remotes/stsquad/tags/pull-tcg-common-tlb-reset-...Peter Maydell1-13/+13
2017-01-13Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell1-0/+1
2017-01-13cputlb: drop flush_global flag from tlb_flushAlex Bennée1-13/+13
2017-01-12qmp: Report QOM type name on query-cpu-definitionsEduardo Habkost1-0/+1
2017-01-10target-arm: Use clz opcodeRichard Henderson1-5/+0
2016-12-27target-arm: Add VBAR support to ARM1176 CPUsCédric Le Goater1-6/+13
2016-12-20Move target-* CPU file into a target/ folderThomas Huth1-0/+9623
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