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target
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arm
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helper.c
Age
Commit message (
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Author
Files
Lines
2024-04-08
target/arm: Use correct SecuritySpace for AArch64 AT ops at EL3
Peter Maydell
1
-2
/
+5
2024-04-05
target/arm: Fix CNTPOFF_EL2 trap to missing EL3
Pierre-Clément Tosi
1
-1
/
+2
2024-03-07
target/arm: Implement FEAT_ECV CNTPOFF_EL2 handling
Peter Maydell
1
-2
/
+66
2024-03-07
target/arm: Define CNTPCTSS_EL0 and CNTVCTSS_EL0
Peter Maydell
1
-0
/
+43
2024-03-07
target/arm: Implement new FEAT_ECV trap bits
Peter Maydell
1
-5
/
+46
2024-03-07
target/arm: Don't allow RES0 CNTHCTL_EL2 bits to be written
Peter Maydell
1
-0
/
+18
2024-03-07
target/arm: use FIELD macro for CNTHCTL bit definitions
Peter Maydell
1
-5
/
+4
2024-03-07
target/arm: Timer _EL02 registers UNDEF for E2H == 0
Peter Maydell
1
-1
/
+1
2024-02-15
target/arm: Use new CBAR encoding for all v8 CPUs, not all aarch64 CPUs
Peter Maydell
1
-1
/
+1
2024-02-15
target/arm: Don't get MDCR_EL2 in pmu_counter_enabled() before checking ARM_F...
Peter Maydell
1
-2
/
+10
2024-02-03
Merge tag 'pull-tcg-20240202-2' of https://gitlab.com/rth7680/qemu into staging
Peter Maydell
1
-1
/
+1
2024-02-03
target/arm: Split out arm_env_mmu_index
Richard Henderson
1
-1
/
+1
2024-02-02
target/arm: Add ID_AA64ZFR0_EL1.B16B16 to the exposed-to-userspace set
Peter Maydell
1
-0
/
+1
2024-02-02
target/arm: fix exception syndrome for AArch32 bkpt insn
Jan Klötzke
1
-0
/
+18
2024-01-26
target/arm: Move GTimer definitions to new 'gtimer.h' header
Philippe Mathieu-Daudé
1
-0
/
+1
2024-01-26
target/arm: Move e2h_access() helper around
Philippe Mathieu-Daudé
1
-14
/
+15
2024-01-19
target/arm: Ensure icount is enabled when emulating INST_RETIRED
Philippe Mathieu-Daudé
1
-0
/
+2
2024-01-19
system/cpu-timers: Introduce ICountMode enumerator
Philippe Mathieu-Daudé
1
-1
/
+2
2024-01-09
target/arm: Enhance CPU_LOG_INT to show SPSR on AArch64 exception-entry
Peter Maydell
1
-0
/
+1
2024-01-09
target/arm: Mark up VNCR offsets (offsets >= 0x200, except GIC)
Peter Maydell
1
-0
/
+8
2024-01-09
target/arm: Mark up VNCR offsets (offsets 0x168..0x1f8)
Peter Maydell
1
-0
/
+18
2024-01-09
target/arm: Mark up VNCR offsets (offsets 0x100..0x160)
Peter Maydell
1
-0
/
+22
2024-01-09
target/arm: Mark up VNCR offsets (offsets 0x0..0xff)
Peter Maydell
1
-0
/
+12
2024-01-09
target/arm: Handle FEAT_NV2 redirection of SPSR_EL2, ELR_EL2, ESR_EL2, FAR_EL2
Peter Maydell
1
-4
/
+9
2024-01-09
target/arm: Handle FEAT_NV2 changes to when SPSR_EL1.M reports EL2
Peter Maydell
1
-4
/
+12
2024-01-09
target/arm: Implement VNCR_EL2 register
Peter Maydell
1
-0
/
+26
2024-01-09
target/arm: Handle HCR_EL2 accesses for FEAT_NV2 bits
Peter Maydell
1
-0
/
+3
2024-01-09
target/arm: Don't honour PSTATE.PAN when HCR_EL2.{NV, NV1} == {1, 1}
Peter Maydell
1
-0
/
+3
2024-01-09
target/arm: Always use arm_pan_enabled() when checking if PAN is enabled
Peter Maydell
1
-11
/
+11
2024-01-09
target/arm: Trap registers when HCR_EL2.{NV, NV1} == {1, 1}
Peter Maydell
1
-4
/
+41
2024-01-09
target/arm: Set SPSR_EL1.M correctly when nested virt is enabled
Peter Maydell
1
-0
/
+6
2024-01-09
target/arm: Make EL2 cpreg accessfns safe for FEAT_NV EL1 accesses
Peter Maydell
1
-7
/
+58
2024-01-09
target/arm: *_EL12 registers should UNDEF when HCR_EL2.E2H is 0
Peter Maydell
1
-0
/
+16
2024-01-09
target/arm: Record correct opcode fields in cpreg for E2H aliases
Peter Maydell
1
-0
/
+35
2024-01-09
target/arm: Implement HCR_EL2.AT handling
Peter Maydell
1
-6
/
+15
2024-01-09
target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NV
Peter Maydell
1
-1
/
+5
2024-01-08
Replace "iothread lock" with "BQL" in comments
Stefan Hajnoczi
1
-1
/
+1
2024-01-08
system/cpus: rename qemu_mutex_lock_iothread() to bql_lock()
Stefan Hajnoczi
1
-2
/
+2
2024-01-05
target/arm: Use generic cpu_list()
Gavin Shan
1
-46
/
+0
2023-12-19
target/arm/helper: Propagate MDCR_EL2.HPMN into PMCR_EL0.N
Jean-Philippe Brucker
1
-2
/
+20
2023-12-19
target/arm: Restrict DC CVAP & DC CVADP instructions to TCG accel
Philippe Mathieu-Daudé
1
-0
/
+5
2023-12-19
target/arm: Restrict TCG specific helpers
Philippe Mathieu-Daudé
1
-55
/
+0
2023-12-19
target/arm: Don't implement *32_EL2 registers when EL1 is AArch64 only
Peter Maydell
1
-14
/
+21
2023-11-27
target/arm: Handle overflow in calculation of next timer tick
Peter Maydell
1
-4
/
+21
2023-11-08
target/arm: hide aliased MIDR from gdbstub
Alex Bennée
1
-1
/
+1
2023-11-08
target/arm: mark the 32bit alias of PAR when LPAE enabled
Alex Bennée
1
-14
/
+21
2023-10-27
target/arm: Move feature test functions to their own header
Peter Maydell
1
-0
/
+1
2023-10-19
target/arm: Implement FEAT_HPMN0
Peter Maydell
1
-1
/
+1
2023-10-19
target/arm: Fix CNTPCT_EL0 trapping from EL0 when HCR_EL2.E2H is 0
Michal Orzel
1
-16
/
+1
2023-10-04
accel/tcg: Replace CPUState.env_ptr with cpu_env()
Richard Henderson
1
-1
/
+1
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