riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-01-21	target/arm: Filter cycle counter based on PMCCFILTR_EL0	Aaron Lindsay	1	-7/+89
2019-01-21	target/arm: Swap PMU values before/after migrations	Aaron Lindsay	1	-2/+4
2019-01-21	target/arm: Reorganize PMCCNTR accesses	Aaron Lindsay	1	-45/+69
2019-01-21	target/arm: Add PAuth system registers	Richard Henderson	1	-0/+70
2019-01-21	target/arm: Reuse aa64_va_parameters for setting tbflags	Richard Henderson	1	-46/+24
2019-01-21	target/arm: Decode TBID from TCR	Richard Henderson	1	-3/+11
2019-01-21	target/arm: Add aa64_va_parameters_both	Richard Henderson	1	-2/+8
2019-01-21	target/arm: Export aa64_va_parameters to internals.h	Richard Henderson	1	-2/+2
2019-01-21	target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII	Richard Henderson	1	-3/+2
2019-01-21	target/arm: Create ARMVAParameters and helpers	Richard Henderson	1	-128/+150
2019-01-21	target/arm: Introduce arm_stage1_mmu_idx	Richard Henderson	1	-0/+7
2019-01-21	target/arm: Introduce arm_mmu_idx	Richard Henderson	1	-11/+16
2019-01-21	target/arm: Move cpu_mmu_index out of line	Richard Henderson	1	-0/+44
2019-01-21	target/arm: Add PAuth active bit to tbflags	Richard Henderson	1	-0/+19
2019-01-21	target/arm: Allow Aarch32 exception return to switch from Mon->Hyp	Alexander Graf	1	-1/+1
2019-01-07	target/arm: Convert ARM_TBFLAG_* to FIELDs	Richard Henderson	1	-25/+24
2018-12-13	target/arm: Implement the ARMv8.1-LOR extension	Richard Henderson	1	-0/+75
2018-12-13	target/arm: Use arm_hcr_el2_eff more places	Richard Henderson	1	-7/+5
2018-12-13	target/arm: Introduce arm_hcr_el2_eff	Richard Henderson	1	-9/+57
2018-12-13	target/arm: Implement the ARMv8.2-AA32HPD extension	Richard Henderson	1	-8/+29
2018-12-13	target/arm: Implement the ARMv8.1-HPD extension	Richard Henderson	1	-7/+20
2018-12-13	target/arm: Tidy scr_write	Richard Henderson	1	-5/+9
2018-12-13	target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_el	Richard Henderson	1	-3/+0
2018-12-13	target/arm: Move id_aa64mmfr* to ARMISARegisters	Peter Maydell	1	-2/+2
2018-11-13	target/arm: Hyp mode R14 is shared with User and System	Peter Maydell	1	-14/+15
2018-11-13	target/arm: Correctly implement handling of HCR_EL2.{VI, VF}	Peter Maydell	1	-2/+18
2018-11-13	Revert "target/arm: Implement HCR.VI and VF"	Peter Maydell	1	-43/+4
2018-11-13	target/arm: Fix typo in tlbi_aa64_vmalle1_write	Richard Henderson	1	-1/+1
2018-11-13	target/arm: Remove antique TODO comment	Peter Maydell	1	-1/+0
2018-11-13	target/arm: Remove workaround for small SAU regions	Peter Maydell	1	-12/+0
2018-11-06	target/arm: Fix ATS1Hx instructions	Peter Maydell	1	-2/+2
2018-11-06	target/arm: Set S and PTW in 64-bit PAR format	Peter Maydell	1	-4/+6
2018-10-24	target/arm: Only flush tlb if ASID changes	Richard Henderson	1	-5/+3
2018-10-24	target/arm: Remove writefn from TTBR0_EL3	Richard Henderson	1	-1/+1
2018-10-24	target/arm: Report correct syndrome for FP/SIMD traps to Hyp mode	Peter Maydell	1	-0/+9
2018-10-24	target/arm: Get IL bit correct for v7 syndrome values	Peter Maydell	1	-0/+13
2018-10-24	target/arm: New utility function to extract EC from syndrome	Peter Maydell	1	-2/+2
2018-10-24	target/arm: Implement HCR.PTW	Peter Maydell	1	-1/+20
2018-10-24	target/arm: Implement HCR.VI and VF	Peter Maydell	1	-4/+43
2018-10-24	target/arm: ISR_EL1 bits track virtual interrupts if IMO/FMO set	Peter Maydell	1	-4/+18
2018-10-24	target/arm: Implement HCR.DC	Peter Maydell	1	-2/+21
2018-10-24	target/arm: Implement HCR.FB	Peter Maydell	1	-72/+113
2018-10-24	target/arm: Make switch_mode() file-local	Peter Maydell	1	-2/+4
2018-10-24	target/arm: Improve debug logging of AArch32 exception return	Peter Maydell	1	-0/+10
2018-10-24	target/arm: Convert v8.2-fp16 from feature bit to aa64pfr0 test	Richard Henderson	1	-1/+1
2018-10-24	target/arm: Convert sve from feature bit to aa64pfr0 test	Richard Henderson	1	-3/+6
2018-10-24	target/arm: Move some system registers into a substructure	Richard Henderson	1	-14/+14
2018-10-16	target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write	Peter Maydell	1	-2/+2
2018-10-16	target/arm: Mask PMOVSR writes based on supported counters	Aaron Lindsay	1	-0/+1
2018-10-16	target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO	Aaron Lindsay	1	-2/+4