riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-03-05	target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe	Rebecca Cran	1	-1/+14
2021-02-16	linux-user/aarch64: Implement PROT_MTE	Richard Henderson	1	-0/+1
2021-02-16	linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE	Richard Henderson	1	-0/+31
2021-02-11	target/arm: Add support for FEAT_DIT, Data Independent Timing	Rebecca Cran	1	-0/+12
2021-02-11	target/arm: Fix SCR RES1 handling	Mike Nawrocki	1	-0/+5
2021-01-29	target/arm: Implement ID_PFR2	Richard Henderson	1	-0/+1
2021-01-19	target/arm: Implement SCR_EL2.EEL2	Rémi Denis-Courmont	1	-2/+6
2021-01-19	target/arm: set HPFAR_EL2.NS on secure stage 2 faults	Rémi Denis-Courmont	1	-0/+2
2021-01-19	target/arm: secure stage 2 translation regime	Rémi Denis-Courmont	1	-1/+5
2021-01-19	target/arm: add ARMv8.4-SEL2 system registers	Rémi Denis-Courmont	1	-0/+7
2021-01-19	target/arm: add MMU stage 1 for Secure EL2	Rémi Denis-Courmont	1	-14/+23
2021-01-19	target/arm: Define isar_feature function to test for presence of SEL2	Rémi Denis-Courmont	1	-0/+5
2021-01-19	target/arm: use arm_is_el2_enabled() where applicable	Rémi Denis-Courmont	1	-2/+2
2021-01-19	target/arm: add arm_is_el2_enabled() helper	Rémi Denis-Courmont	1	-0/+17
2021-01-19	target/arm: Add cpu properties to control pauth	Richard Henderson	1	-0/+10
2021-01-19	target/arm: Implement an IMPDEF pauth algorithm	Richard Henderson	1	-4/+11
2021-01-18	semihosting: Change common-semi API to be architecture-independent	Keith Packard	1	-8/+0
2021-01-12	target/arm: add aarch32 ID register fields to cpu.h	Leif Lindholm	1	-0/+28
2021-01-12	target/arm: add aarch64 ID register fields to cpu.h	Leif Lindholm	1	-0/+15
2021-01-12	target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h	Leif Lindholm	1	-0/+31
2021-01-12	target/arm: make ARMCPU.ctr 64-bit	Leif Lindholm	1	-1/+1
2021-01-12	target/arm: make ARMCPU.clidr 64-bit	Leif Lindholm	1	-1/+1
2021-01-12	target/arm: fix typo in cpu.h ID_AA64PFR1 field name	Leif Lindholm	1	-1/+1
2021-01-12	target/arm: ARMv8.4-TTST extension	Rémi Denis-Courmont	1	-0/+5
2020-12-10	target/arm: Implement M-profile "minimal RAS implementation"	Peter Maydell	1	-0/+14
2020-12-10	hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bit	Peter Maydell	1	-0/+2
2020-12-10	hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1M	Peter Maydell	1	-0/+5
2020-12-10	target/arm: Implement M-profile FPSCR_nzcvqc	Peter Maydell	1	-0/+13
2020-12-10	target/arm: Refactor M-profile VMSR/VMRS handling	Peter Maydell	1	-0/+3
2020-12-10	target/arm: Implement VSCCLRM insn	Peter Maydell	1	-0/+9
2020-11-15	arm tcg cpus: Fix Lesser GPL version number	Chetan Pant	1	-1/+1
2020-10-27	linux-user: Set PAGE_TARGET_1 for TARGET_PROT_BTI	Richard Henderson	1	-0/+5
2020-10-20	target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension	Peter Maydell	1	-0/+1
2020-10-20	target/arm: Implement v8.1M branch-future insns (as NOPs)	Peter Maydell	1	-0/+6
2020-10-20	target/arm: Implement v8.1M NOCP handling	Peter Maydell	1	-0/+1
2020-10-08	hw/arm/virt: Implement kvm-steal-time	Andrew Jones	1	-0/+4
2020-10-01	target/arm: Make isar_feature_aa32_fp16_arith() handle M-profile	Peter Maydell	1	-5/+26
2020-10-01	target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters	Peter Maydell	1	-2/+2
2020-10-01	target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check	Peter Maydell	1	-1/+14
2020-09-08	target/arm: Move start-powered-off property to generic CPUState	Thiago Jung Bauermann	1	-3/+0
2020-09-01	target/arm: Use correct ID register check for aa32_fp16_arith	Peter Maydell	1	-6/+1
2020-08-24	target/arm: Implement FPST_STD_F16 fpstatus	Peter Maydell	1	-1/+8
2020-08-24	target/arm: Delete unused ARM_FEATURE_CRC	Peter Maydell	1	-1/+0
2020-07-03	target/arm: kvm: Handle misconfigured dabt injection	Beata Michalska	1	-0/+2
2020-06-26	target/arm: Create tagged ram when MTE is enabled	Richard Henderson	1	-0/+6
2020-06-26	target/arm: Implement data cache set allocation tags	Richard Henderson	1	-1/+3
2020-06-26	target/arm: Add mte helpers for sve scalar + int loads	Richard Henderson	1	-0/+1
2020-06-26	target/arm: Add arm_tlb_bti_gp	Richard Henderson	1	-0/+13
2020-06-26	target/arm: Add MTE bits to tb_flags	Richard Henderson	1	-4/+8
2020-06-26	target/arm: Add MTE system registers	Richard Henderson	1	-0/+4