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path: root/target/arm/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2022-09-29target/arm: Update SDCR_VALID_MASK to include SCCDPeter Maydell1-1/+7
2022-09-14target/arm: Support 64-bit event counters for FEAT_PMUv3p5Peter Maydell1-0/+1
2022-09-14target/arm: Implement FEAT_PMUv3p5 cycle counter disable bitsPeter Maydell1-0/+20
2022-09-14target/arm: Rename pmu_8_n feature test functionsPeter Maydell1-8/+8
2022-09-14target/arm: Implement ID_DFR1Peter Maydell1-0/+1
2022-09-14target/arm: Implement ID_MMFR5Peter Maydell1-0/+1
2022-07-26target/arm: Add MO_128 entry to pred_esz_masks[]Peter Maydell1-1/+1
2022-07-18target/arm: Honour VTCR_EL2 bits in Secure EL2Peter Maydell1-0/+19
2022-07-18target/arm: Store TCR_EL* registers as uint64_tPeter Maydell1-7/+1
2022-07-18target/arm: Store VTCR_EL2, VSTCR_EL2 registers as uint64_tPeter Maydell1-2/+2
2022-07-18linux-user/aarch64: Do not clear PROT_MTE on mprotectRichard Henderson1-2/+5
2022-07-11target/arm: Trap non-streaming usage when Streaming SVE is activeRichard Henderson1-0/+7
2022-07-07target/arm: Correctly implement Feat_DoubleLockPeter Maydell1-0/+20
2022-07-07target/arm: Implement AArch32 DBGDEVID, DBGDEVID1, DBGDEVID2Peter Maydell1-0/+7
2022-06-27target/arm: Add SVL to TB flagsRichard Henderson1-0/+12
2022-06-27target/arm: Introduce sve_vqm1_for_el_smRichard Henderson1-2/+7
2022-06-27target/arm: Add cpu properties for SMERichard Henderson1-0/+2
2022-06-27target/arm: Unexport aarch64_add_*_propertiesRichard Henderson1-3/+0
2022-06-27target/arm: Move arm_cpu_*_finalize to internals.hRichard Henderson1-6/+0
2022-06-27target/arm: Create ARMVQMapRichard Henderson1-15/+14
2022-06-27target/arm: Implement SMSTART, SMSTOPRichard Henderson1-0/+1
2022-06-27target/arm: Add the SME ZA storage to CPUARMStateRichard Henderson1-0/+22
2022-06-27target/arm: Add PSTATE.{SM,ZA} to TB flagsRichard Henderson1-0/+2
2022-06-27target/arm: Add SMCR_ELxRichard Henderson1-2/+6
2022-06-27target/arm: Add SVCRRichard Henderson1-0/+6
2022-06-27target/arm: Add SMEEXC_EL to TB flagsRichard Henderson1-0/+2
2022-06-27target/arm: Implement TPIDR2_EL0Richard Henderson1-0/+1
2022-06-10target/arm: SCR_EL3.RW is RAO/WI without AArch32 EL[12]Richard Henderson1-0/+5
2022-06-10target/arm: Move arm_debug_target_el to debug_helper.cRichard Henderson1-21/+0
2022-06-10target/arm: Remove TBFLAG_ANY.DEBUG_TARGET_ELRichard Henderson1-4/+2
2022-06-10target/arm: Move arm_generate_debug_exceptions out of lineRichard Henderson1-91/+0
2022-06-10target/arm: Move arm_singlestep_active out of lineRichard Henderson1-10/+0
2022-06-08target/arm: Add ID_AA64SMFR0_EL1Richard Henderson1-0/+25
2022-06-08target/arm: Add isar_feature_aa64_smeRichard Henderson1-0/+5
2022-06-08target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_elRichard Henderson1-1/+10
2022-06-08target/arm: Use uint32_t instead of bitmap for sve vq'sRichard Henderson1-3/+3
2022-06-08linux-user/aarch64: Introduce sve_vqRichard Henderson1-0/+11
2022-06-08target/arm: Rename TBFLAG_A64 ZCR_LEN to VLRichard Henderson1-1/+2
2022-06-08target/arm: Implement FEAT_DoubleFaultPeter Maydell1-0/+5
2022-05-19target/arm: Use FIELD definitions for CPACR, CPTR_ELxRichard Henderson1-5/+39
2022-05-19target/arm: Enable FEAT_HCX for -cpu maxRichard Henderson1-0/+20
2022-05-19target/arm: Make number of counters in PMCR follow the CPUPeter Maydell1-0/+1
2022-05-19hw/intc/arm_gicv3: Use correct number of priority bits for the CPUPeter Maydell1-0/+1
2022-05-19target/arm: Implement FEAT_IDSTPeter Maydell1-0/+5
2022-05-19target/arm: Implement FEAT_S2FWBPeter Maydell1-0/+5
2022-05-09target/arm: Enable FEAT_CSV2_2 for -cpu maxRichard Henderson1-0/+16
2022-05-09target/arm: Implement virtual SError exceptionsRichard Henderson1-0/+2
2022-05-09target/arm: Add minimal RAS registersRichard Henderson1-0/+5
2022-05-05target/arm: Add isar_feature_{aa64,any}_rasRichard Henderson1-0/+10
2022-05-05target/arm: Add isar predicates for FEAT_Debugv8p2Richard Henderson1-0/+15