Age | Commit message (Expand) | Author | Files | Lines |
2023-11-07 | target: Move ArchCPUClass definition to 'cpu.h' | Philippe Mathieu-Daudé | 1 | -0/+25 |
2023-11-07 | target/arm: Move internal declarations from 'cpu-qom.h' to 'cpu.h' | Philippe Mathieu-Daudé | 1 | -0/+22 |
2023-11-07 | target: Unify QOM style | Philippe Mathieu-Daudé | 1 | -2/+0 |
2023-10-27 | target/arm: Move feature test functions to their own header | Peter Maydell | 1 | -971/+0 |
2023-10-19 | target/arm/arm-powerctl: Correctly init CPUs when powered on to lower EL | Peter Maydell | 1 | -0/+22 |
2023-10-03 | accel/tcg: Move CPUNegativeOffsetState into CPUState | Richard Henderson | 1 | -1/+0 |
2023-09-21 | target/arm: Define new TB flag for ATA0 | Peter Maydell | 1 | -0/+1 |
2023-09-21 | target/arm: Implement FEAT_MOPS enable bits | Peter Maydell | 1 | -0/+6 |
2023-09-21 | target/arm: Implement FEAT_HBC | Peter Maydell | 1 | -0/+5 |
2023-09-21 | target/arm: Update AArch64 ID register field definitions | Peter Maydell | 1 | -0/+23 |
2023-09-11 | Merge tag 'pull-target-arm-20230908' of https://git.linaro.org/people/pmaydel... | Stefan Hajnoczi | 1 | -8/+46 |
2023-09-08 | target/arm: Implement FEAT_TIDCP1 | Richard Henderson | 1 | -0/+5 |
2023-09-08 | target/arm: Implement FEAT_PACQARMA3 | Richard Henderson | 1 | -0/+1 |
2023-09-08 | target/arm: Add feature detection for FEAT_Pauth2 and extensions | Aaron Lindsay | 1 | -8/+39 |
2023-09-08 | target/arm: Add ID_AA64ISAR2_EL1 | Aaron Lindsay | 1 | -0/+1 |
2023-09-08 | trivial: Simplify the spots that use TARGET_BIG_ENDIAN as a numeric value | Thomas Huth | 1 | -10/+2 |
2023-08-31 | target/arm: Allow cpu to configure GM blocksize | Richard Henderson | 1 | -0/+2 |
2023-08-31 | target/arm: Reduce dcz_blocksize to uint8_t | Richard Henderson | 1 | -1/+2 |
2023-08-22 | target/arm/helper: Implement CNTHCTL_EL2.CNT[VP]MASK | Jean-Philippe Brucker | 1 | -0/+4 |
2023-08-22 | target/arm: Pass an ARMSecuritySpace to arm_is_el2_enabled_secstate() | Peter Maydell | 1 | -5/+8 |
2023-08-22 | target/arm/ptw: Pass an ARMSecuritySpace to arm_hcr_el2_eff_secstate() | Peter Maydell | 1 | -1/+1 |
2023-07-25 | arm: spelling fixes | Michael Tokarev | 1 | -1/+1 |
2023-06-28 | target/arm: Restrict KVM-specific fields from ArchCPU | Philippe Mathieu-Daudé | 1 | -0/+2 |
2023-06-26 | target: Widen pc/cs_base in cpu_get_tb_cpu_state | Anton Johansson | 1 | -2/+2 |
2023-06-23 | target/arm: Implement GPC exceptions | Richard Henderson | 1 | -0/+1 |
2023-06-23 | target/arm: Introduce ARMMMUIdx_Phys_{Realm,Root} | Richard Henderson | 1 | -2/+21 |
2023-06-23 | target/arm: Adjust the order of Phys and Stage2 ARMMMUIdx | Richard Henderson | 1 | -6/+6 |
2023-06-23 | target/arm: Introduce ARMSecuritySpace | Richard Henderson | 1 | -22/+67 |
2023-06-23 | target/arm: Add RME cpregs | Richard Henderson | 1 | -0/+19 |
2023-06-23 | target/arm: Update SCR and HCR for RME | Richard Henderson | 1 | -2/+3 |
2023-06-23 | target/arm: Add isar_feature_aa64_rme | Richard Henderson | 1 | -0/+6 |
2023-06-15 | target/arm: Allow users to set the number of VFP registers | Cédric Le Goater | 1 | -0/+2 |
2023-06-06 | target/arm: Add SCTLR.nAA to TBFLAG_A64 | Richard Henderson | 1 | -1/+2 |
2023-06-06 | target/arm: Add feature test for FEAT_LSE2 | Richard Henderson | 1 | -0/+5 |
2023-06-06 | target/arm: Add commentary for CPUARMState.exclusive_high | Richard Henderson | 1 | -0/+8 |
2023-05-19 | Revert "arm/kvm: add support for MTE" | Peter Maydell | 1 | -4/+0 |
2023-05-18 | arm/kvm: add support for MTE | Cornelia Huck | 1 | -0/+4 |
2023-04-20 | target/arm: Implement FEAT_PAN3 | Peter Maydell | 1 | -0/+5 |
2023-03-06 | target/arm: Diagnose incorrect usage of arm_is_secure subroutines | Richard Henderson | 1 | -1/+4 |
2023-03-06 | target/arm: Handle m-profile in arm_is_secure | Richard Henderson | 1 | -0/+3 |
2023-03-06 | target/arm: Implement gdbstub m-profile systemreg and secext | Richard Henderson | 1 | -0/+2 |
2023-03-06 | target/arm: Move arm_gen_dynamic_svereg_xml to gdbstub64.c | Richard Henderson | 1 | -6/+0 |
2023-03-06 | target/arm: Unexport arm_gen_dynamic_sysreg_xml | Richard Henderson | 1 | -1/+0 |
2023-02-27 | target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu | Philippe Mathieu-Daudé | 1 | -1/+1 |
2023-02-16 | target/arm: Move cpregs code out of cpu.h | Fabiano Rosas | 1 | -91/+0 |
2023-02-16 | target/arm: Declare CPU <-> NVIC helpers in 'hw/intc/armv7m_nvic.h' | Philippe Mathieu-Daudé | 1 | -123/+0 |
2023-02-16 | target/arm: Store CPUARMState::nvic as NVICState* | Philippe Mathieu-Daudé | 1 | -22/+24 |
2023-02-16 | target/arm: Restrict CPUARMState::nvic to sysemu | Philippe Mathieu-Daudé | 1 | -1/+1 |
2023-02-16 | target/arm: Restrict CPUARMState::arm_boot_info to sysemu | Philippe Mathieu-Daudé | 1 | -1/+1 |
2023-02-16 | target/arm: Restrict CPUARMState::gicv3state to sysemu | Philippe Mathieu-Daudé | 1 | -1/+2 |