aboutsummaryrefslogtreecommitdiff
path: root/target/arm/cpu.c
AgeCommit message (Expand)AuthorFilesLines
2019-01-07arm: replace instance_post_init()Marc-André Lureau1-6/+24
2018-12-16Merge remote-tracking branch 'remotes/pmaydell/tags/pull-misc-20181214' into ...Peter Maydell1-9/+24
2018-12-14target/arm: Create timers in realize, not initPeter Maydell1-8/+9
2018-12-14target/arm: Free name string in ARMCPRegInfo hashtable entriesPeter Maydell1-1/+15
2018-12-13target/arm: Implement the ARMv8.2-AA32HPD extensionRichard Henderson1-0/+4
2018-11-13target/arm/cpu: Give Cortex-A15 and -A7 the EL2 featurePeter Maydell1-0/+2
2018-11-13target/arm: Correctly implement handling of HCR_EL2.{VI, VF}Peter Maydell1-1/+47
2018-11-13target/arm: Track the state of our irq lines from the GIC explicitlyPeter Maydell1-0/+17
2018-11-02target/arm: Conditionalize some asserts on aarch32 supportRichard Henderson1-2/+13
2018-10-24target/arm: Convert jazelle from feature bit to isar1 testRichard Henderson1-3/+14
2018-10-24target/arm: Convert division from feature bits to isar0 testsRichard Henderson1-9/+1
2018-10-24target/arm: Convert v8 extensions from feature bits to isar testsRichard Henderson1-9/+18
2018-10-24target/arm: V8M should not imply V7VERichard Henderson1-1/+5
2018-10-24target/arm: Move some system registers into a substructureRichard Henderson1-89/+89
2018-10-16target/arm: Fix cortex-a7 id_isar0Richard Henderson1-1/+4
2018-10-16target/arm: Align cortex-r5 id_isar0Richard Henderson1-1/+1
2018-09-25target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp modePeter Maydell1-2/+12
2018-08-16target/arm: add "cortex-m0" CPU modelStefan Hajnoczi1-0/+11
2018-08-16target/arm: Add sve-max-vq cpu property to -cpu maxRichard Henderson1-3/+3
2018-08-14arm: Add ARMv6-M programmer's model supportJulia Suvorova1-0/+4
2018-07-02loader: Check access size when calling rom_ptr() to avoid crashesThomas Huth1-1/+1
2018-06-29target/arm: Add ID_ISAR6Richard Henderson1-0/+4
2018-06-29target/arm: Prune a15 features from maxRichard Henderson1-3/+0
2018-06-29target/arm: Add ARM_FEATURE_V7VE for v7 Virtualization ExtensionsAaron Lindsay1-7/+14
2018-06-29target/arm: Implement ARMv8.2-DotProdRichard Henderson1-0/+1
2018-06-29target/arm: Enable SVE for aarch64-linux-userRichard Henderson1-0/+7
2018-06-22target/arm: Introduce ARM_FEATURE_M_MAINJulia Suvorova1-0/+3
2018-06-22target-arm: Add the Cortex-R5FEdgar E. Iglesias1-0/+9
2018-06-15arm: Don't crash if user tries to use a Cortex-M CPU without an NVICPeter Maydell1-0/+18
2018-06-12object: fix OBJ_PROP_LINK_UNREF_ON_RELEASE ambivalenceMarc-André Lureau1-2/+2
2018-05-18target/arm: Add the XML dynamic generationAbdallah Bouassida1-0/+1
2018-05-15target/arm: Fix fp_status_f16 tininess before roundingPeter Maydell1-0/+2
2018-04-26target/arm: Add pre-EL change hooksAaron Lindsay1-0/+16
2018-04-26target/arm: Support multiple EL change hooksAaron Lindsay1-5/+16
2018-03-09target/arm: Make 'any' CPU just an alias for 'max'Peter Maydell1-23/+27
2018-03-09target/arm: Add "-cpu max" supportPeter Maydell1-0/+24
2018-03-09target/arm: Move definition of 'host' cpu type into cpu.cPeter Maydell1-0/+24
2018-03-09target/arm: Query host CPU features on-demand at instance initPeter Maydell1-0/+13
2018-03-09target/arm: Add a core count propertyAlistair Francis1-0/+6
2018-03-02target/arm: Enable ARM_FEATURE_V8_FCMARichard Henderson1-0/+1
2018-03-02target/arm: Enable ARM_FEATURE_V8_RDMRichard Henderson1-0/+1
2018-03-02target/arm: Add Cortex-M33Peter Maydell1-0/+31
2018-03-02target/arm: Define init-svtor property for the reset secure VTOR valuePeter Maydell1-4/+14
2018-03-02target/arm: Define an IDAU interfacePeter Maydell1-0/+15
2018-02-21target/*/cpu.h: remove softfloat.hAlex Bennée1-0/+1
2018-02-15hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVICPeter Maydell1-0/+28
2018-02-05qdev: use device_class_set_parent_realize/unrealize/reset()Philippe Mathieu-Daudé1-2/+2
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier1-2/+2
2017-12-21cpu: refactor cpu_address_space_init()Peter Xu1-10/+3
2017-11-09disas: Dump insn bytes along with capstone disassemblyRichard Henderson1-0/+6
generated by cgit v1.1 at 2024-11-01 20:20:12 +0000