index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
stable-9.1
stable-9.2
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
staging-9.2
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target-xtensa
/
xtensa-semi.c
Age
Commit message (
Expand
)
Author
Files
Lines
2016-12-20
Move target-* CPU file into a target/ folder
Thomas Huth
1
-318
/
+0
2016-01-29
xtensa: Clean up includes
Peter Maydell
1
-4
/
+1
2015-12-17
xtensa: avoid "naked" qemu_log
Paolo Bonzini
1
-1
/
+1
2014-05-28
tcg: Invert the inclusion of helper.h
Richard Henderson
1
-1
/
+1
2013-07-23
exec: Change cpu_memory_rw_debug() argument to CPUState
Andreas Färber
1
-5
/
+5
2013-07-23
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Andreas Färber
1
-2
/
+2
2012-12-19
misc: move include files to include/qemu/
Paolo Bonzini
1
-1
/
+1
2012-10-23
Rename target_phys_addr_t to hwaddr
Avi Kivity
1
-3
/
+3
2012-09-08
target-xtensa: fix missing errno codes for mingw32
Max Filippov
1
-0
/
+6
2012-09-05
target-xtensa: convert host errno values to guest
Max Filippov
1
-8
/
+98
2012-09-01
target-xtensa: return ENOSYS for unimplemented simcalls
Max Filippov
1
-0
/
+2
2012-06-10
target-xtensa: remove unnecessary include of dyngen-exec.h
Peter Portante
1
-1
/
+0
2012-06-07
build: move obj-TARGET-y variables to nested Makefile.objs
Paolo Bonzini
1
-0
/
+224