index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target-sparc
/
ldst_helper.c
Age
Commit message (
Expand
)
Author
Files
Lines
2013-02-16
target-sparc: Fix debug output for DEBUG_MMU
Andreas Färber
1
-1
/
+1
2012-12-19
exec: move include files to include/exec/
Paolo Bonzini
1
-5
/
+5
2012-12-16
exec: refactor cpu_restore_state
Blue Swirl
1
-18
/
+6
2012-11-01
target-sparc: make do_unaligned_access static
Blue Swirl
1
-2
/
+6
2012-10-23
Rename target_phys_addr_t to hwaddr
Avi Kivity
1
-18
/
+18
2012-10-07
target-sparc: Move sdivx and udivx out of line
Richard Henderson
1
-2
/
+2
2012-06-21
qemu-log: use LOG_UNIMP for some target CPU cases
Blue Swirl
1
-32
/
+48
2012-05-12
fix block loads broken in commit 30038fd818
Artyom Tarasenko
1
-1
/
+1
2012-04-14
Use uintptr_t for various op related functions
Blue Swirl
1
-7
/
+5
2012-03-18
Sparc: avoid AREG0 wrappers for memory access helpers
Blue Swirl
1
-4
/
+69
2012-03-18
Sparc: avoid AREG0 for memory access helpers
Blue Swirl
1
-189
/
+167
2012-03-17
sparc64: implement PCI and ISA irqs
Blue Swirl
1
-6
/
+14
2012-03-14
target-sparc: Don't overuse CPUState
Andreas Färber
1
-8
/
+8
2011-10-26
target-sparc: Change fpr representation to doubles.
Richard Henderson
1
-41
/
+30
2011-10-26
target-sparc: Pass float64 parameters instead of dt0/1 temporaries.
Richard Henderson
1
-52
/
+0
2011-10-26
Sparc: split load and store op helpers
Blue Swirl
1
-0
/
+2434