aboutsummaryrefslogtreecommitdiff
path: root/target-sparc/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2013-07-23cpu: Introduce CPUClass::memory_rw_debug() for target_memory_rw_debug()Andreas Färber1-3/+2
2013-07-23cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber1-6/+0
2013-07-09linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-userPeter Maydell1-12/+0
2013-06-28cpu: Turn cpu_unassigned_access() into a CPUState hookAndreas Färber1-2/+3
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-1/+0
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-2/+3
2013-02-23SPARC LEON power-down support addedRonald Hecht1-0/+1
2012-12-19fpu: move public header file to include/fpuPaolo Bonzini1-1/+1
2012-12-19misc: move include files to include/qemu/Paolo Bonzini1-1/+1
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-3/+3
2012-12-16exec: refactor cpu_restore_stateBlue Swirl1-1/+0
2012-12-07target-sparc: Remove t0, t1 from CPUSPARCStateRichard Henderson1-1/+0
2012-11-03Merge branch 'trivial-patches' of git://github.com/stefanha/qemuBlue Swirl1-3/+0
2012-11-01target-sparc: make do_unaligned_access staticBlue Swirl1-3/+0
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber1-1/+3
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-2/+2
2012-10-07target-sparc: Move sdivx and udivx out of lineRichard Henderson1-0/+1
2012-06-04target-sparc: Let cpu_sparc_init() return SPARCCPUAndreas Färber1-3/+14
2012-04-14Use uintptr_t for various op related functionsBlue Swirl1-1/+1
2012-04-07target-sparc: QOM'ify CPUAndreas Färber1-0/+1
2012-03-24target-sparc: Add compiler attribute to some functions which don't returnStefan Weil1-2/+3
2012-03-18Sparc: avoid AREG0 wrappers for memory access helpersBlue Swirl1-83/+2
2012-03-18Sparc: avoid AREG0 for memory access helpersBlue Swirl1-0/+82
2012-03-17sparc64: implement PCI and ISA irqsBlue Swirl1-0/+3
2012-03-17sparc: reset CPU state on resetBlue Swirl1-2/+3
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
2012-03-14target-sparc: Don't overuse CPUStateAndreas Färber1-28/+28
2012-03-14target-sparc: Typedef struct CPUSPARCState earlyAndreas Färber1-2/+4
2011-10-26target-sparc: Change fpr representation to doubles.Richard Henderson1-3/+4
2011-10-26target-sparc: Pass float64 parameters instead of dt0/1 temporaries.Richard Henderson1-1/+0
2011-10-26Sparc: split MMU helpersBlue Swirl1-1/+1
2011-10-26Sparc: avoid AREG0 for softint op helpers and Leon cache controlBlue Swirl1-6/+25
2011-10-23Sparc: split CWP and PSTATE op helpersBlue Swirl1-1/+3
2011-10-23Sparc: split helper.cBlue Swirl1-1/+2
2011-09-10Gdbstub: Fix back-trace on SPARC32Fabien Chouteau1-0/+7
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl1-1/+1
2011-07-21SPARC64: implement addtional MMU faults related to nonfaulting loadTsuneo Saito1-0/+4
2011-07-21SPARC64: split cpu_get_phys_page_debug() from cpu_get_phys_page_nofault()Tsuneo Saito1-0/+2
2011-07-21SPARC64: SFSR cleanup and fixTsuneo Saito1-0/+22
2011-07-21SPARC64: TTE bits cleanupTsuneo Saito1-0/+7
2011-07-20Fix unassigned memory access handlingBlue Swirl1-2/+2
2011-07-14Sparc: fix FPU and AM enable checks for translationBlue Swirl1-16/+33
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl1-0/+14
2011-06-26sparc: move do_interrupt to helper.cBlue Swirl1-0/+4
2011-06-26Sparc32: dummy implementation of MXCC MMU breakpoint registersBlue Swirl1-1/+3
2011-02-01SPARC: Fix Leon3 cache controlFabien Chouteau1-2/+6
2011-01-24SPARC: Add asr17 register supportFabien Chouteau1-0/+1
2011-01-24SPARC: Emulation of Leon3Fabien Chouteau1-14/+23
2010-12-19Sparc: implement monitor command 'info tlb'Blue Swirl1-1/+1
2010-12-04target-sparc: Use fprintf_function (format checking)Stefan Weil1-2/+2
generated by cgit v1.1 at 2024-11-03 22:57:57 +0000