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path: root/target-sh4/helper.c
AgeCommit message (Expand)AuthorFilesLines
2013-04-08hw: move headers to include/Paolo Bonzini1-1/+1
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-4/+8
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-2/+3
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-9/+9
2012-03-14target-sh4: Don't overuse CPUStateAndreas Färber1-14/+14
2011-12-05Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori1-1/+1
2011-12-02fix spelling in target sub directoryDong Xu Wang1-1/+1
2011-11-24sh_intc: convert interrupt controller to memory APIBenoît Canet1-0/+3
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl1-2/+2
2011-06-26Remove exec-all.h include directivesBlue Swirl1-1/+0
2011-03-03target-sh4: move intr_at_halt out of cpu_halted()Aurelien Jarno1-2/+2
2011-01-26target-sh4: update PTEH upon MMU exceptionAlexandre Courbot1-0/+4
2011-01-26sh4: implement missing mmaped TLB read functionsAurelien Jarno1-0/+74
2011-01-26sh4: implement missing mmaped TLB write functionsAurelien Jarno1-1/+61
2011-01-25target-sh4: fix index of address read error exceptionAlexandre Courbot1-1/+1
2011-01-25target-sh4: fix TLB invalidation codeAlexandre Courbot1-2/+2
2011-01-15target-sh4: correct use of ! and &Aurelien Jarno1-2/+2
2011-01-10target-sh4: improve TLBAurelien Jarno1-21/+44
2011-01-09target-sh4: implement writes to mmaped ITLBAurelien Jarno1-0/+19
2010-03-18Replace assert(0) with abort() or cpu_abort()Blue Swirl1-3/+3
2010-03-17Large page TLB flushPaul Brook1-1/+2
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook1-5/+0
2010-02-14Fix incorrect exception_index useBlue Swirl1-1/+1
2010-02-09target-sh4: MMU: separate execute and read/write permissionsAurelien Jarno1-21/+6
2010-02-09target-sh4: MMU: fix store queue addressesAurelien Jarno1-1/+1
2010-02-09target-sh4: MMU: remove dead codeAurelien Jarno1-18/+0
2010-02-09target-sh4: MMU: optimize UTLB accessesAurelien Jarno1-24/+14
2010-02-09target-sh4: MMU: fix ITLB priviledge checkAurelien Jarno1-1/+1
2010-02-09target-sh4: MMU: simplify call to tlb_set_page()Aurelien Jarno1-6/+3
2010-02-09sh7750: handle MMUCR TI bitAurelien Jarno1-0/+18
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-3/+3
2009-10-01Get rid of _t suffixmalc1-3/+3
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
2009-05-13Include assert.h from qemu-common.hPaul Brook1-1/+0
2009-04-03SH: Fix linux-user _is_cached typo.edgar_igl1-1/+1
2009-04-03SH: Add cpu_sh4_is_cached for linux-user.edgar_igl1-0/+6
2009-04-01SH: Improve movca.l/ocbi emulation.edgar_igl1-0/+44
2009-03-03SH4: Fixed last UTLB unused and URB/URC managementaurel321-1/+1
2009-03-03SH4: Fixed last UTLB unusedaurel321-1/+1
2009-03-03SH4: Fixed last UTLB unusedaurel321-1/+1
2009-03-03clean build: Fix remaining sh4 warningsaurel321-7/+7
2009-01-15global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori1-1/+1
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori1-3/+3
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
2008-12-10target-sh4: Add SH bit handling to TLBaurel321-6/+6
2008-12-07SH4: Eliminate P4 to A7 mangling (Takashi YOSHII).balrog1-12/+0
2008-12-07SH: On-chip PCI controller support (Takashi YOSHII).balrog1-0/+3
2008-11-21target-sh4: fix TLB/MMU emulationaurel321-36/+29
2008-08-22[sh4] MMU bug fixaurel321-3/+20
2008-08-22[sh4] memory mapped TLB entriesaurel321-11/+111
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