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path: root/target-s390x/translate.c
AgeCommit message (Expand)AuthorFilesLines
2016-12-20Move target-* CPU file into a target/ folderThomas Huth1-5452/+0
2016-11-01log: Add locking to large logging blocksRichard Henderson1-0/+2
2016-06-24softfloat: Implement run-time-configurable meaning of signaling NaN bitAleksandar Markovic1-3/+3
2016-06-20exec: [tcg] Track which vCPU is performing translation and executionLluís Vilanova1-0/+1
2016-06-05target-*: dfilter support for in_asmRichard Henderson1-1/+2
2016-05-19cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini1-0/+1
2016-05-12tcg: Allow goto_tb to any target PC in user modeSergey Fedorov1-6/+11
2016-05-12tcg: Clean up direct block chaining safety checksSergey Fedorov1-1/+1
2016-03-01tcg: Add type for vCPU pointersLluís Vilanova1-1/+1
2016-02-09tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson1-9/+9
2016-02-03log: do not unnecessarily include qom/cpu.hPaolo Bonzini1-0/+1
2016-01-29s390: Clean up includesPeter Maydell1-0/+1
2015-10-28target-*: Advance pc after recognizing a breakpointRichard Henderson1-0/+5
2015-10-08Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20151007' into stagingPeter Maydell1-58/+20
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson1-40/+4
2015-10-07tcg: Pass data argument to restore_state_to_opcRichard Henderson1-4/+4
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson1-0/+3
2015-10-07target-s390x: Add cc_op state to insn_startRichard Henderson1-1/+1
2015-10-07target-*: Introduce and use cpu_breakpoint_testRichard Henderson1-10/+6
2015-10-07target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson1-1/+2
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson1-4/+2
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson1-1/+1
2015-10-02s390x/info registers: print vector registers properlyChristian Borntraeger1-1/+1
2015-08-24tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson1-15/+15
2015-06-22disas: Remove uses of CPU envPeter Crosthwaite1-1/+1
2015-06-17target-s390x: PER: add Breaking-Event-Address registerAurelien Jarno1-6/+23
2015-06-17target-s390x: PER instruction-fetch event supportAurelien Jarno1-0/+8
2015-06-17target-s390x: PER successful-branching event supportAurelien Jarno1-0/+39
2015-06-17target-s390x: basic PER event handlingAurelien Jarno1-1/+17
2015-06-17target-s390x: wire up I/O instructions in TCG modeAlexander Graf1-3/+95
2015-06-17target-s390x: wire up DIAG IPL in TCG modeAurelien Jarno1-6/+10
2015-06-05target-s390x: implement high-word facilityAurelien Jarno1-0/+51
2015-06-05target-s390x: implement load-and-trap facilityAurelien Jarno1-9/+71
2015-06-05target-s390x: implement miscellaneous-instruction-extensions facilityAurelien Jarno1-0/+1
2015-06-05target-s390x: implement TRANSLATE EXTENDED instructionAurelien Jarno1-0/+9
2015-06-05target-s390x: implement TRANSLATE AND TEST instructionAurelien Jarno1-0/+10
2015-06-05target-s390x: implement LOAD FP INTEGER instructionsAurelien Jarno1-0/+25
2015-06-05target-s390x: fix exception for invalid operation codeAurelien Jarno1-1/+1
2015-06-05target-s390x: implement LAY and LAEY instructionsAurelien Jarno1-0/+35
2015-06-05target-s390x: fix LOAD MULTIPLE instruction on page boundaryAurelien Jarno1-29/+99
2015-06-05target-s390x: optimize (negative-) abs computationAurelien Jarno1-2/+14
2015-06-05target-s390x: fix CC computation for EX instructionAurelien Jarno1-2/+1
2015-05-27s390x: Add vector registers to HMP outputEric Farman1-0/+6
2015-05-27s390x: Vector Register IOCTLsEric Farman1-1/+1
2015-05-27s390x: Common access to floating point registersEric Farman1-1/+1
2015-05-13s390x: Add interlocked access facility 1 instructionsAlexander Graf1-0/+35
2015-05-13s390x: Fix stoc directionAlexander Graf1-0/+4
2015-04-30misc: Fix new collection of typosStefan Weil1-1/+1
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson1-3/+4
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson1-6/+3
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