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2012-06-09target-ppc: Unbreak kvm_ppc.c buildAndreas Färber1-1/+1
2012-06-07build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini1-0/+3
2012-06-07build: move libobj-y variable to nested Makefile.objsPaolo Bonzini1-1/+3
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini1-0/+1
2012-06-04Kill off cpu_state_reset()Andreas Färber1-5/+0
2012-06-04target-ppc: Let cpu_ppc_init() return PowerPCCPUAndreas Färber2-4/+12
2012-05-01target-ppc: Some support for dumping TLB_EMB TLBsFrançois Revol1-0/+50
2012-05-01PPC: Fix up e500 cache size settingAlexander Graf1-12/+14
2012-04-15target-ppc/machine.c: Drop unnecessary ifdefsJuan Quintela1-8/+0
2012-04-15target-ppc: Init dcache and icache size for e500 user modeMeador Inge1-1/+4
2012-04-15target-ppc: Fix type casts for w64 (uintptr_t)Stefan Weil1-3/+3
2012-04-15target-ppc: QOM'ify CPU resetAndreas Färber3-46/+47
2012-04-15target-ppc: Start QOM'ifying CPU initAndreas Färber2-1/+11
2012-04-15target-ppc: QOM'ify CPUAndreas Färber4-1/+119
2012-04-15target-ppc: Add hooks for handling tcg and kvm limitationsDavid Gibson4-25/+54
2012-04-15target-ppc: Drop cpu_ppc_close()Andreas Färber2-7/+0
2012-04-15PPC: Fix TLB invalidation bug within the PPC interrupt handler.Mark Cave-Ayland1-1/+1
2012-04-14Use uintptr_t for various op related functionsBlue Swirl1-5/+3
2012-04-07Replace Qemu by QEMU in commentsStefan Weil5-21/+21
2012-03-15PPC: KVM: Synchronize regs on CPU dumpAlexander Graf1-0/+2
2012-03-15ppc: Correctly define POWERPC_INSNS2_DEFAULTMeador Inge1-2/+2
2012-03-15PPC: Fix large page support in TCGNathan Whitehorn1-6/+6
2012-03-15PPC: Add PIR register to POWER7 CPUNathan Whitehorn1-0/+5
2012-03-15PPC64: Add support for ldbrx and stdbrx instructionsThomas Huth3-11/+47
2012-03-15pseries: Don't try to munmap() a malloc()ed TCE tableDavid Gibson1-2/+10
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
2012-03-14target-ppc: Don't overuse CPUStateAndreas Färber8-152/+152
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-1/+1
2012-03-14PPC: 405: Use proper CPU resetAlexander Graf1-0/+3
2012-02-28target-ppc: Clean includesStefan Weil2-12/+0
2012-02-11ppc: remove unused variablesBlue Swirl1-3/+0
2012-02-02PPC: E500: Populate L1CFG0 SPRAlexander Graf1-1/+4
2012-02-02PPC: e500mc: Enable processor controlAlexander Graf1-1/+1
2012-02-02PPC: E500: Implement msgsndAlexander Graf3-0/+35
2012-02-02PPC: E500: Implement msgclrAlexander Graf3-0/+54
2012-02-02PPC: Enable doorbell excp handlersAlexander Graf1-14/+2
2012-02-02PPC: Add CPU feature for processor controlAlexander Graf1-1/+3
2012-02-02PPC: E500: Add doorbell definesAlexander Graf1-0/+16
2012-02-02PPC: E500: Add some more excp vectorsAlexander Graf1-1/+4
2012-02-02PPC: booke206: move avail check to tlbweAlexander Graf2-7/+10
2012-02-02PPC: booke206: Check for TLB overrunAlexander Graf4-1/+29
2012-02-02PPC: booke206: Implement tlbilxAlexander Graf3-0/+102
2012-02-02PPC: booke206: Check for min/max TLB entry sizeAlexander Graf1-0/+11
2012-02-02PPC: booke: add tlbnps handlingAlexander Graf1-0/+25
2012-02-02PPC: booke206: allow NULL raddr in ppcmas_tlb_checkAlexander Graf1-1/+4
2012-02-02PPC: rename msync to msync_4xxAlexander Graf1-2/+2
2012-02-02PPC: e500: msync is 440 only, e500 has real syncAlexander Graf2-5/+4
2012-02-02PPC: e500mc: add missing IVORs to bitmapAlexander Graf1-1/+5
2012-02-02PPC: Add IVOR 38-42Alexander Graf2-14/+20
2012-02-02PPC: KVM: Update HIOR code to new interfaceAlexander Graf1-3/+7