aboutsummaryrefslogtreecommitdiff
path: root/target-ppc/translate.c
AgeCommit message (Expand)AuthorFilesLines
2016-06-23ppc: Add P7/P8 Power Management instructionsBenjamin Herrenschmidt1-0/+66
2016-06-23ppc: Move exception generation code out of lineBenjamin Herrenschmidt1-3/+3
2016-06-23ppc: Turn a bunch of booleans from int to boolBenjamin Herrenschmidt1-19/+18
2016-06-23ppc: Add real mode CI load/store instructions for P7 and P8Benjamin Herrenschmidt1-11/+48
2016-06-23ppc: Rework generation of priv and inval interruptsBenjamin Herrenschmidt1-399/+291
2016-06-23ppc: Fix rfi/rfid/hrfi/... emulationBenjamin Herrenschmidt1-0/+4
2016-06-22target-ppc: Fix rlwimi, rlwinm, rlwnm againRichard Henderson1-3/+1
2016-06-22ppc64: disable gen_pause() for linux-user modeLaurent Vivier1-1/+3
2016-06-20exec: [tcg] Track which vCPU is performing translation and executionLluís Vilanova1-0/+1
2016-06-17target-ppc: Fix rlwimi, rlwinm, rlwnmRichard Henderson1-21/+52
2016-06-17target-ppc: Bug in BookE wait instructionJakub Horak1-1/+1
2016-06-07ppc: Do not take exceptions on unknown SPRs in privileged modeBenjamin Herrenschmidt1-2/+9
2016-06-07ppc: Add missing slbfee. instruction on ppc64 BookS processorsBenjamin Herrenschmidt1-0/+26
2016-06-07ppc: Fix slbia decodeBenjamin Herrenschmidt1-1/+1
2016-06-07ppc: Fix mtmsr decodingBenjamin Herrenschmidt1-1/+1
2016-06-07ppc: POWER7 has lq/stq instructions and stq need to check ISABenjamin Herrenschmidt1-1/+4
2016-06-07ppc: Batch TLB flushes on 32-bit 6xx/7xx/7xxx in hash modeBenjamin Herrenschmidt1-6/+21
2016-06-07ppc: fix hrfid, tlbia and slbia privilegeCédric Le Goater1-3/+3
2016-06-07ppc: Better figure out if processor has HV modeBenjamin Herrenschmidt1-1/+3
2016-06-05target-*: dfilter support for in_asmRichard Henderson1-1/+2
2016-05-30ppc: Get out of emulation on SMT "OR" opsBenjamin Herrenschmidt1-3/+18
2016-05-30ppc: Fix sign extension issue in mtmsr(d) emulationMichael Neuling1-2/+2
2016-05-30ppc: Change 'invalid' bit mask of tlbiel and tlbieBenjamin Herrenschmidt1-2/+4
2016-05-30ppc: tlbie, tlbia and tlbisync are HV onlyBenjamin Herrenschmidt1-3/+3
2016-05-30ppc: Do some batching of TCG tlb flushesBenjamin Herrenschmidt1-3/+36
2016-05-30ppc: Use split I/D mmu modes to avoid flushes on interruptsBenjamin Herrenschmidt1-3/+4
2016-05-27target-ppc: Cleanups to rldinm, rldnm, rldimiRichard Henderson1-45/+46
2016-05-27target-ppc: Use 32-bit rotate instead of deposit + 64-bit rotateRichard Henderson1-102/+70
2016-05-27target-ppc: Use movcond in iselRichard Henderson1-18/+11
2016-05-19cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini1-0/+1
2016-05-12tcg: Allow goto_tb to any target PC in user modeSergey Fedorov1-5/+15
2016-04-18ppc: Fix the range check in the LSWI instructionThomas Huth1-4/+2
2016-03-24ppc: Add macros to register hypervisor mode SPRsBenjamin Herrenschmidt1-10/+16
2016-03-01tcg: Add type for vCPU pointersLluís Vilanova1-1/+1
2016-02-17target-ppc: Include missing MMU models for SDR1 in info registersDavid Gibson1-0/+2
2016-02-09tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson1-22/+22
2016-02-03log: do not unnecessarily include qom/cpu.hPaolo Bonzini1-0/+1
2016-02-01target-ppc: mcrfs should always update FEX/VX and only clear exception bitsJames Clarke1-4/+17
2016-01-30target-ppc: Split 44x tlbiva from ppc_tlb_invalidate_one()David Gibson1-1/+1
2016-01-29ppc: Clean up includesPeter Maydell1-0/+1
2015-12-17ppc: cleanup loggingPaolo Bonzini1-13/+9
2015-12-17qemu-log: introduce qemu_log_separatePaolo Bonzini1-16/+24
2015-11-12PPC: Allow Rc bit to be set on mtsprAlexander Graf1-1/+1
2015-10-28target-*: Advance pc after recognizing a breakpointRichard Henderson1-0/+5
2015-10-23ppc: Add mmu_model defines for arch 2.03 and 2.07Benjamin Herrenschmidt1-2/+2
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson1-35/+5
2015-10-07tcg: Pass data argument to restore_state_to_opcRichard Henderson1-2/+3
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson1-1/+5
2015-10-07target-*: Introduce and use cpu_breakpoint_testRichard Henderson1-9/+5
2015-10-07target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson1-2/+2
generated by cgit v1.1 at 2025-01-16 09:22:17 +0000