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path: root/target-ppc/translate.c
AgeCommit message (Expand)AuthorFilesLines
2012-06-24target-ppc: Fix build with --enable-debugStefan Weil1-1/+1
2012-06-24PPC: Add support for MSR_CMAlexander Graf1-1/+1
2012-06-24ppc: Move load and store helpers, switch to AREG0 free modeBlue Swirl1-15/+15
2012-06-24ppc: Avoid AREG0 for misc helpersBlue Swirl1-1/+1
2012-06-24ppc: Avoid AREG0 for timebase helpersBlue Swirl1-6/+10
2012-06-24ppc: Avoid AREG0 for MMU etc. helpersBlue Swirl1-39/+46
2012-06-24ppc: Avoid AREG0 for integer and vector helpersBlue Swirl1-55/+119
2012-06-24ppc: Avoid AREG0 for FPU and SPE helpersBlue Swirl1-48/+65
2012-06-24ppc: Avoid AREG0 for exception helpersBlue Swirl1-19/+21
2012-04-15target-ppc: QOM'ify CPU resetAndreas Färber1-1/+1
2012-03-15PPC: KVM: Synchronize regs on CPU dumpAlexander Graf1-0/+2
2012-03-15PPC64: Add support for ldbrx and stdbrx instructionsThomas Huth1-9/+43
2012-03-14target-ppc: Don't overuse CPUStateAndreas Färber1-39/+39
2012-02-28target-ppc: Clean includesStefan Weil1-6/+0
2012-02-02PPC: E500: Implement msgsndAlexander Graf1-0/+16
2012-02-02PPC: E500: Implement msgclrAlexander Graf1-0/+18
2012-02-02PPC: booke206: Check for TLB overrunAlexander Graf1-0/+1
2012-02-02PPC: booke206: Implement tlbilxAlexander Graf1-0/+35
2012-02-02PPC: rename msync to msync_4xxAlexander Graf1-2/+2
2012-02-02PPC: e500: msync is 440 only, e500 has real syncAlexander Graf1-2/+1
2011-11-11PPC: Fix for the gdb single step problem on an rfi instructionSebastian Bauer1-1/+3
2011-10-30Set an invalid-bits mask for each SPE instructionsFabien Chouteau1-229/+271
2011-10-06Implement POWER7's CFAR in TCGDavid Gibson1-0/+28
2011-08-23PPC: E500: Inject SPE exception on invalid SPE accessAlexander Graf1-39/+39
2011-07-01Merge branch 'ppc-next' of git://repo.or.cz/qemu/agrafBlue Swirl1-11/+6
2011-06-26Remove exec-all.h include directivesBlue Swirl1-1/+0
2011-06-17PPC: Only set lower 32bits with mtmsrAlexander Graf1-11/+6
2011-06-03target-ppc: remove old CONFIG_SOFTFLOAT #ifdefAurelien Jarno1-2/+0
2011-05-12PPC: Implement e500 (FSL) MMUAlexander Graf1-5/+90
2011-05-12PPC: Add another 64 bits to instruction feature maskAlexander Graf1-6/+19
2011-05-09monitor: add PPC BookE SPRsScott Wood1-3/+79
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil1-2/+1
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil1-1/+1
2011-04-01Parse SDR1 on mtspr instead of at translate timeDavid Gibson1-1/+1
2011-04-01Correct ppc popcntb logic, implement popcntw and popcntdDavid Gibson1-5/+15
2011-04-01Implement PowerPC slbmfee and slbmfev instructionsDavid Gibson1-1/+30
2011-04-01target-ppc: ext32u instead of andi with constantAurelien Jarno1-4/+4
2011-03-22target-ppc: add support for 6 SPE instructionsFabien Chouteau1-4/+198
2011-01-21ppc: Correct BookE tlb readsEdgar E. Iglesias1-1/+1
2010-12-31Fix translation of unary PPC/SPE instructions (efdneg etc.).Mike Pall1-18/+21
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil1-8/+6
2010-09-15PPC: Enable hint bits for lwarx/ldarxAlexander Graf1-2/+2
2010-07-13target-ppc: add vexptefp instructionAurelien Jarno1-0/+2
2010-05-22Fix %lld or %llx printf format useBlue Swirl1-3/+4
2010-05-05target-ppc: Remove duplicate cpu log.Richard Henderson1-2/+0
2010-04-25ppc: remove dead assignments, spotted by clang analyzerBlue Swirl1-1/+1
2010-04-18PPC: avoid function pointer type mismatch, spotted by clangBlue Swirl1-5/+3
2010-03-11target-ppc: fix evsrwu and evsrws (second try)Aurelien Jarno1-2/+2
2010-03-11target-ppc: fix evsrwu and evsrwsAurelien Jarno1-2/+2
2010-03-11target-ppc: fix evslw instructionAurelien Jarno1-1/+1
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