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path: root/target-ppc/translate.c
AgeCommit message (Expand)AuthorFilesLines
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini1-0/+1
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-3/+2
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber1-2/+2
2014-03-05target-ppc: Use Additional Temporary in stqcx CaseTom Musta1-3/+5
2014-03-05target-ppc/translate.c: Use ULL suffix for 64 bit constantsPeter Maydell1-2/+2
2014-03-05target-ppc: Altivec 2.07: Vector Permute and Exclusive ORTom Musta1-1/+6
2014-03-05target-ppc: Altivec 2.07: Vector SHA Sigma InstructionsTom Musta1-0/+24
2014-03-05target-ppc: Altivec 2.07: AES InstructionsTom Musta1-0/+29
2014-03-05target-ppc: Altivec 2.07: Binary Coded Decimal InstructionsTom Musta1-4/+41
2014-03-05target-ppc: Altivec 2.07: Vector Polynomial Multiply SumTom Musta1-0/+8
2014-03-05target-ppc: Altivec 2.07: Vector Gather Bits by BytesTom Musta1-0/+2
2014-03-05target-ppc: Altivec 2.07: Doubleword ComparesTom Musta1-3/+13
2014-03-05target-ppc: Altivec 2.07: vbpermq InstructionTom Musta1-0/+2
2014-03-05target-ppc: Altivec 2.07: Quadword Addition and SubtracationTom Musta1-0/+18
2014-03-05target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift InstructionsTom Musta1-0/+8
2014-03-05target-ppc: Altivec 2.07: Vector Merge InstructionsTom Musta1-0/+37
2014-03-05target-ppc: Altivec 2.07: Unpack Signed Word InstructionsTom Musta1-0/+4
2014-03-05target-ppc: Altivec 2.07: Pack Doubleword InstructionsTom Musta1-0/+8
2014-03-05target-ppc: Altivec 2.07: Vector Min/Max Doubleword InstructionsTom Musta1-0/+8
2014-03-05target-ppc: Altivec 2.07: Vector Population Count InstructionsTom Musta1-4/+18
2014-03-05target-ppc: Altivec 2.07: Add Vector Count Leading ZeroesTom Musta1-0/+9
2014-03-05target-ppc: Altivec 2.07: vmuluw InstructionTom Musta1-1/+4
2014-03-05target-ppc: Altivec 2.07: Multiply Even/Odd Word InstructionsTom Musta1-0/+8
2014-03-05target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword ModuloTom Musta1-0/+4
2014-03-05target-ppc: Altivec 2.07: Vector Logical InstructionsTom Musta1-0/+11
2014-03-05target-ppc: Altivec 2.07: Add Support for R-Form Dual InstructionsTom Musta1-0/+35
2014-03-05target-ppc: Altivec 2.07: Add Opcode Macro for VX Form InstructionsTom Musta1-0/+5
2014-03-05target-ppc: Altivec 2.07: Add Support for Dual Altivec InstructionsTom Musta1-0/+24
2014-03-05target-ppc: Altivec 2.07: Add GEN_VXFORM3Tom Musta1-0/+19
2014-03-05target-ppc: Add Store Quadword ConditionalTom Musta1-0/+21
2014-03-05target-ppc: Add Load Quadword and ReserveTom Musta1-0/+37
2014-03-05target-ppc: Store QuadwordTom Musta1-16/+23
2014-03-05target-ppc: Load QuadwordTom Musta1-14/+22
2014-03-05target-ppc: Add is_user_mode Utility RoutineTom Musta1-0/+14
2014-03-05target-ppc: Add bctar InstructionTom Musta1-1/+10
2014-03-05target-ppc: Fix xxpermdi When T==A or T==BTom Musta1-8/+33
2014-03-05target-ppc: add extended opcodes for dcbt/dcbtstCédric Le Goater1-2/+2
2014-03-05target-ppc: Add ISA2.06 lfiwzx InstructionTom Musta1-0/+15
2014-03-05target-ppc: Add ISA 2.06 ftsqrtTom Musta1-0/+10
2014-03-05target-ppc: Add ISA 2.06 ftdiv InstructionTom Musta1-0/+13
2014-03-05target-ppc: Add ISA 2.06 fcfid[u][s] InstructionsTom Musta1-0/+9
2014-03-05target-ppc: Add ISA2.06 Float to Integer InstructionsTom Musta1-0/+12
2014-03-05target-ppc: Add ISA 2.06 stbcx. and sthcx. InstructionsTom Musta1-47/+44
2014-03-05target-ppc: Add ISA2.06 lbarx, lharx InstructionsTom Musta1-26/+24
2014-03-05target-ppc: Add ISA 2.06 divwe[o] InstructionsTom Musta1-0/+4
2014-03-05target-ppc: Add ISA 2.06 divweu[o] InstructionsTom Musta1-0/+5
2014-03-05target-ppc: Add ISA2.06 divde[o] InstructionsTom Musta1-1/+4
2014-03-05target-ppc: Add ISA2.06 divdeu[o] InstructionsTom Musta1-0/+21
2014-03-05target-ppc: Add ISA2.06 bpermd InstructionTom Musta1-0/+10
2014-03-05target-ppc: Scalar Non-Signalling ConversionsTom Musta1-0/+4
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