index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
stable-9.1
stable-9.2
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
staging-9.2
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target-ppc
/
op.c
Age
Commit message (
Expand
)
Author
Files
Lines
2008-12-07
target-ppc: convert SPR accesses to TCG
aurel32
1
-320
/
+0
2008-12-06
target-ppc: convert SLB/TLB instructions to TCG
aurel32
1
-150
/
+0
2008-12-06
target-ppc: convert dcr load/store to TCG
aurel32
1
-12
/
+0
2008-12-06
target-ppc: convert msr load/store to TCG
aurel32
1
-43
/
+0
2008-12-06
target-ppc: convert POWER bridge instructions to TCG
aurel32
1
-112
/
+0
2008-12-05
target-ppc: convert POWER shift instructions to TCG
aurel32
1
-127
/
+0
2008-11-30
target-ppc: convert PPC 440 instructions to TCG
aurel32
1
-17
/
+0
2008-11-30
target-ppc: convert return from interrupt instructions to TCG
aurel32
1
-53
/
+0
2008-11-30
target-ppc: convert external load/store instructions to TCG
aurel32
1
-16
/
+0
2008-11-30
target-ppc: convert dcbz instruction to TCG
aurel32
1
-17
/
+0
2008-11-30
target-ppc: convert wait instruction to TCG
aurel32
1
-6
/
+0
2008-11-30
target-ppc: convert mfrom instruction to TCG
aurel32
1
-9
/
+0
2008-11-30
target-ppc: remove dead code from op.c
aurel32
1
-6
/
+0
2008-11-30
target-ppc: convert software TLB instructions to TCG
aurel32
1
-28
/
+0
2008-11-27
target-ppc: convert SPE load/store to TCG
aurel32
1
-32
/
+0
2008-11-24
target-ppc: convert trap instructions to TCG
aurel32
1
-15
/
+0
2008-11-23
target-ppc: convert SPE FP ops to TCG
aurel32
1
-464
/
+0
2008-11-22
target-ppc: convert exceptions generation to TCG
aurel32
1
-11
/
+0
2008-11-19
target-ppc: convert fp ops to TCG
aurel32
1
-280
/
+0
2008-11-10
target-ppc: convert most SPE integer instructions to TCG
aurel32
1
-162
/
+0
2008-11-01
target-ppc: convert 405 MAC instructions to TCG
aurel32
1
-95
/
+0
2008-11-01
target-ppc: convert arithmetic functions to TCG
aurel32
1
-398
/
+0
2008-10-27
target-ppc: convert rotation instructions to TCG
aurel32
1
-56
/
+0
2008-10-21
target-ppc: convert branch related instructions to TCG
aurel32
1
-160
/
+0
2008-10-21
target-ppc: convert logical instructions to TCG
aurel32
1
-248
/
+0
2008-10-21
target-ppc: convert crf related instructions to TCG
aurel32
1
-179
/
+0
2008-10-21
target-ppc: Convert XER accesses to TCG
aurel32
1
-75
/
+39
2008-10-15
PPC: convert SPE logical instructions to TCG
aurel32
1
-48
/
+0
2008-10-14
PPC: convert effective address computation to TCG
aurel32
1
-6
/
+0
2008-10-01
target-ppc: fix computation of XER.{CA, OV} in addme, subfme
aurel32
1
-8
/
+0
2008-10-01
target-ppc: fix mullw/mullwo
aurel32
1
-0
/
+4
2008-09-14
ppc: Convert op_andi to TCG
aurel32
1
-27
/
+0
2008-09-14
ppc: Convert ctr, lr moves to TCG
aurel32
1
-24
/
+0
2008-09-05
ppc: Convert op_subf to TCG
aurel32
1
-7
/
+0
2008-09-05
ppc: Convert op_add, op_addi to TCG
aurel32
1
-13
/
+0
2008-09-04
ppc: replace op_set_FT0 with tcg_gen_movi_i64
aurel32
1
-10
/
+0
2008-09-04
ppc: Convert nip moves to TCG
aurel32
1
-30
/
+0
2008-09-04
ppc: Convert CRF moves to TCG
aurel32
1
-36
/
+0
2008-09-04
ppc: Convert FPR moves to TCG
aurel32
1
-72
/
+0
2008-09-02
[ppc] Convert op_moven_T2_T0 to TCG
aurel32
1
-7
/
+0
2008-09-02
[ppc] Convert op_reset_T0, op_set_{T0, T1} to TCG
aurel32
1
-42
/
+0
2008-09-02
[ppc] Convert op_move_{T1,T2}_T0 to TCG
aurel32
1
-12
/
+0
2008-08-24
Revert commits 5082 and 5083
aurel32
1
-0
/
+87
2008-08-24
PPC: Switch a few instructions to TCG
aurel32
1
-87
/
+0
2008-04-07
Revert revisions r4168 and r4169. That's work in progress, not ready for trun...
aurel32
1
-7
/
+7
2008-04-07
Always enable precise emulation when softfloat is used
aurel32
1
-7
/
+7
2008-03-13
Use float32/64 instead of float/double
aurel32
1
-58
/
+27
2008-02-01
use the TCG code generator
bellard
1
-15
/
+0
2007-11-16
Always make PowerPC hypervisor mode memory accesses and instructions
j_mayer
1
-4
/
+0
2007-11-12
Allow use of SPE extension by all PowerPC targets,
j_mayer
1
-2
/
+0
[next]