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target-mips
Age
Commit message (
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Author
Files
Lines
2013-07-23
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Andreas Färber
3
-3
/
+10
2013-07-23
cpu: Move singlestep_enabled field from CPU_COMMON to CPUState
Andreas Färber
1
-4
/
+7
2013-07-23
cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()
Andreas Färber
2
-7
/
+11
2013-07-23
cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()
Andreas Färber
1
-0
/
+14
2013-07-09
cpu: Move reset logging to CPUState
Andreas Färber
1
-5
/
+0
2013-07-09
log: Change log_cpu_state[_mask]() argument to CPUState
Andreas Färber
2
-2
/
+2
2013-07-09
target-mips: Change gen_intermediate_code_internal() argument to MIPSCPU
Andreas Färber
1
-4
/
+5
2013-07-09
cpu: Make first_cpu and next_cpu CPUState
Andreas Färber
1
-13
/
+12
2013-07-09
cpu: Drop unnecessary dynamic casts in *_env_get_cpu()
Andreas Färber
1
-1
/
+1
2013-07-09
linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-user
Peter Maydell
1
-13
/
+0
2013-06-28
cpu: Turn cpu_unassigned_access() into a CPUState hook
Andreas Färber
3
-6
/
+13
2013-06-28
cpu: Change qemu_init_vcpu() argument to CPUState
Andreas Färber
1
-1
/
+0
2013-06-28
cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks
Andreas Färber
3
-2
/
+7
2013-05-20
linux-user: Save the correct resume address for MIPS signal handling
Kwok Cheung Yeung
2
-2
/
+3
2013-05-20
target-mips: clean-up in BIT_INSV
Petar Jovanovic
1
-10
/
+6
2013-05-19
target-mips: set carry bit correctly in DSPControl register
Petar Jovanovic
1
-3
/
+4
2013-05-19
target-mips: fix EXTPDP and setting up pos field in the DSPControl reg
Petar Jovanovic
1
-5
/
+5
2013-05-17
target-mips: fix incorrect behaviour for EXTP
Petar Jovanovic
1
-2
/
+1
2013-05-08
target-mips: fix incorrect behaviour for INSV
Petar Jovanovic
1
-2
/
+2
2013-05-08
target-mips: add missing check_dspr2 for multiply instructions
Petar Jovanovic
1
-0
/
+1
2013-05-03
target-mips: fix calculation of overflow for SHLL.PH and SHLL.QB
Petar Jovanovic
1
-24
/
+6
2013-04-15
target-mips: fix mipsdsp_mul_q15_q15 and tests for MAQ_SA_W_PHL/PHR
Petar Jovanovic
1
-13
/
+1
2013-03-17
target-mips: fix rndrashift_short_acc and code for EXTR_ instructions
Petar Jovanovic
1
-14
/
+9
2013-03-12
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
Andreas Färber
4
-3
/
+7
2013-03-12
cpu: Pass CPUState to cpu_interrupt()
Andreas Färber
1
-4
/
+4
2013-03-12
exec: Pass CPUState to cpu_reset_interrupt()
Andreas Färber
1
-3
/
+2
2013-03-12
cpu: Move halted and interrupt_request fields to CPUState
Andreas Färber
3
-7
/
+11
2013-03-05
mips64-linux-user: Enable 64-bit address mode and fpu
Richard Henderson
1
-0
/
+12
2013-03-05
mips-linux-user: Save and restore fpu and dsp from sigcontext
Richard Henderson
2
-3
/
+16
2013-03-05
target-mips: Fix accumulator selection for MIPS16 and microMIPS
Richard Sandiford
1
-84
/
+64
2013-03-04
target-mips: fix DSP overflow macro and affected routines
Petar Jovanovic
1
-42
/
+48
2013-03-03
gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end
Peter Maydell
1
-2
/
+2
2013-03-03
cpu: Introduce ENV_OFFSET macros
Andreas Färber
1
-0
/
+1
2013-02-23
target-mips: fix for sign-issue in MULQ_W helper
Petar Jovanovic
1
-1
/
+1
2013-02-23
target-mips: fix for incorrect multiplication with MULQ_S.PH
Petar Jovanovic
1
-1
/
+1
2013-02-23
target-mips: Use mul[us]2 in [D]MULT[U] insns
Richard Henderson
3
-42
/
+20
2013-02-16
cpu: Add CPUArchState pointer to CPUState
Andreas Färber
1
-0
/
+2
2013-02-16
target-mips: Move TCG initialization to MIPSCPU initfn
Andreas Färber
3
-2
/
+6
2013-02-16
target-mips: Introduce QOM realizefn for MIPSCPU
Andreas Färber
3
-2
/
+20
2013-01-31
target-mips: enable access to DSP ASE if implemented
Petar Jovanovic
1
-4
/
+2
2013-01-31
target-mips: Unfuse {,N}M{ADD,SUB}.fmt
Richard Sandiford
1
-8
/
+17
2013-01-31
target-mips: Sign-extend the result of LWR
Richard Sandiford
1
-0
/
+1
2013-01-31
target-mips: Fix signedness of loads in MIPS16 RESTOREs
Richard Sandiford
1
-1
/
+1
2013-01-31
target-mips: implement DSP (d)append sub-class with TCG
Aurelien Jarno
3
-126
/
+87
2013-01-31
target-mips: use DSP unions for reduction add instructions
Aurelien Jarno
1
-16
/
+14
2013-01-31
target-mips: use DSP unions for unary DSP operators
Aurelien Jarno
1
-82
/
+42
2013-01-31
target-mips: use DSP unions for binary DSP operators
Aurelien Jarno
1
-268
/
+116
2013-01-31
target-mips: add unions to access DSP elements
Aurelien Jarno
1
-0
/
+22
2013-01-31
target-mips: generate a reserved instruction exception on CPU without DSP
Aurelien Jarno
1
-2
/
+10
2013-01-31
target-mips: copy insn_flags in DisasContext
Aurelien Jarno
1
-381
/
+381
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