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AgeCommit message (Expand)AuthorFilesLines
2016-02-09tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson1-12/+13
2016-02-03log: do not unnecessarily include qom/cpu.hPaolo Bonzini2-0/+2
2016-01-23mips: Clean up includesPeter Maydell11-9/+11
2016-01-23target-mips: Fix ALIGN instruction when bp=0Miodrag Dinic1-1/+10
2016-01-23target-mips: silence NaNs for cvt.s.d and cvt.d.sAurelien Jarno1-0/+2
2016-01-23target-mips/cpu.h: Fix spell errorDongxue Zhang1-1/+1
2016-01-22fpu: Replace int32 typedef with int32_tPeter Maydell1-12/+12
2016-01-22fpu: Replace uint64 typedef with uint64_tPeter Maydell1-2/+2
2016-01-22fpu: Replace int64 typedef with int64_tPeter Maydell1-6/+6
2015-11-24target-mips: flush QEMU TLB when disabling 64-bit addressingLeon Alrae2-14/+17
2015-11-24target-mips: Fix exceptions while UX=0James Hogan1-0/+12
2015-10-30target-mips: fix updating XContext on mmu exceptionYongbok Kim1-3/+4
2015-10-30target-mips: add SIGRIE instructionYongbok Kim1-1/+11
2015-10-30target-mips: Set Config5.XNP for R6 coresYongbok Kim1-2/+2
2015-10-30target-mips: add PC, XNP reg numbers to RDHWRYongbok Kim4-32/+63
2015-10-29target-mips: Add enum for BREAK32Yongbok Kim1-1/+2
2015-10-29target-mips: update writing to CP0.Status.KX/SX/UX in MIPS Release R6Leon Alrae1-1/+6
2015-10-29target-mips: implement the CPU wake-up on non-enabled interrupts in R6Leon Alrae1-3/+4
2015-10-29target-mips: move the test for enabled interrupts to a separate functionLeon Alrae3-16/+20
2015-10-28target-*: Advance pc after recognizing a breakpointRichard Henderson1-2/+4
2015-10-22disas: QOMify mips specific disas setupPeter Crosthwaite1-0/+9
2015-10-19kvm: Pass PCI device pointer to MSI routing functionsPavel Fedin1-1/+1
2015-10-09qdev: Protect device-list-properties against broken devicesMarkus Armbruster1-0/+7
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson1-43/+5
2015-10-07tcg: Pass data argument to restore_state_to_opcRichard Henderson1-4/+5
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson1-1/+6
2015-10-07target-*: Drop cpu_gen_code defineRichard Henderson1-1/+0
2015-10-07target-mips: Add delayed branch state to insn_startRichard Henderson2-1/+3
2015-10-07target-*: Introduce and use cpu_breakpoint_testRichard Henderson1-15/+10
2015-10-07target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson1-3/+2
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson1-5/+4
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson1-1/+1
2015-09-25mips: Remove ELF_MACHINE from cpu.hPeter Crosthwaite1-2/+0
2015-09-18target-mips: improve exception handlingPavel Dovgaluk5-377/+425
2015-09-18target-mips: correct MTC0 instruction on MIPS64Leon Alrae1-11/+7
2015-09-18target-mips: add missing restriction in DAUI instructionLeon Alrae1-1/+3
2015-09-18target-mips: get rid of MIPS_DEBUG_SIGN_EXTENSIONSAurelien Jarno1-39/+0
2015-09-18target-mips: get rid of MIPS_DEBUGAurelien Jarno1-605/+19
2015-09-18target-mips: Fix RDHWR on CP0.CountAlex Smith1-2/+7
2015-09-18target-mips: remove wrong checks for recip.fmt and rsqrt.fmtPetar Jovanovic1-4/+2
2015-09-18target-mips: Use tcg_gen_extrh_i64_i32Richard Henderson1-26/+22
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt2-3/+3
2015-09-11typofixes - v4Veres Lajos1-1/+1
2015-09-11maint: remove unused include for signal.hDaniel P. Berrange1-1/+0
2015-08-24tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson1-2/+2
2015-08-13target-mips: Use CPU_LOG_INT for logging related to interruptsRichard Henderson2-20/+13
2015-08-13target-mips: simplify LWL/LDL mask generationAurelien Jarno1-8/+6
2015-08-13target-mips: update mips32r5-generic into P5600Yongbok Kim2-25/+30
2015-08-04target-mips: Copy restrictions from ext/ins to dext/dinsRichard Henderson1-20/+25
2015-08-04target-mips: fix semihosting for microMIPS R6Leon Alrae1-3/+7
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