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path: root/target-mips/translate.c
AgeCommit message (Expand)AuthorFilesLines
2007-04-07Implement prefx.ths1-1/+41
2007-04-07Set proper BadVAddress value for unaligned instruction fetch.ths1-1/+2
2007-04-07Actually skip over delay slot for a non-taken branch likely.ths1-2/+2
2007-04-06Save state for all CP0 instructions, they may throw a CPU exception.ths1-0/+1
2007-04-05fix branch delay slot cornercases.ths1-2/+5
2007-04-05Fix rotr immediate ops, mask shift/rotate arguments to their allowedths1-33/+93
2007-04-05Fix RDHWR handling. Code formatting. Don't use *_direct versions to raiseths1-73/+82
2007-04-04Fix code formatting.ths1-66/+66
2007-04-02MIPS32R2 needs RDPGPR/WRPGPR instructions even when no shadow registersths1-2/+9
2007-04-01Actually enable 64bit configuration.ths1-17/+17
2007-03-30Sanitize mips exception handling.ths1-19/+3
2007-03-23Fix enough FPU/R2 support to get 24Kf going.ths1-23/+43
2007-03-21Move mips CPU specific initialization to translate_init.c.ths1-3/+0
2007-03-19Barf on branches/jumps in branch delay slots. Spotted by Stefan Weil.ths1-5/+13
2007-03-19Define gen_intermediate_code_internal as "static inline".ths1-2/+3
2007-03-18MIPS -cpu selection support, by Herve Poussineau.ths1-7/+2
2007-03-02MIPS Userland TLS register emulation, by Daniel Jacobowitz.ths1-0/+6
2007-02-28MIPS FPU dynamic activation, part 1, by Herve Poussineau.ths1-74/+60
2007-02-27Fix mips FPU emulation, 32 bit data types are allowed to use odd registers.ths1-29/+16
2007-02-20Replace TLSZ with TARGET_FMT_lx.ths1-19/+19
2007-01-24EBase is limited to KSEG0/KSEG1 even on 64bit CPUs.ths1-3/+3
2007-01-23Implementing dmfc/dmtc.ths1-2/+1203
2006-12-21Scrap SIGN_EXTEND32.ths1-3/+3
2006-12-21Preliminiary MIPS64 support, disabled by default due to performance impact.ths1-39/+54
2006-12-16Fix erraneous fallthrough in MIPS trap implementation, thanks Atsushi Nemoto.ths1-0/+1
2006-12-10Handle invalid accesses as SIGILL for mips/mipsel userland emulation.ths1-0/+3
2006-12-07Fix build of MIPS target without FPU support.ths1-0/+24
2006-12-07Fix reset handling, CP0 isn't enabled by default (a fact which doesn'tths1-3/+11
2006-12-07Simplify mask construction.ths1-2/+2
2006-12-06Update copyright notice.ths1-0/+1
2006-12-06Add MIPS32R2 instructions, and generally straighten out the instructionths1-547/+1797
2006-12-06Dynamically translate MIPS mtc0 instructions.ths1-1/+212
2006-12-06Dynamically translate MIPS mfc0 instructions.ths1-1/+150
2006-12-06Halt/reboot support for Linux, by Daniel Jacobowitz. This is a band-aidths1-1/+9
2006-12-06MIPS TLB performance improvements, by Daniel Jacobowitz.ths1-0/+1
2006-11-12MIPS FPU fixes (Daniel Jacobowitz).pbrook1-2/+4
2006-10-23add support for cvt.s.d and cvt.d.s (Aurelien Jarno)bellard1-0/+14
2006-06-26lwu support - generate exception if unaligned pc (Marius Groeger)bellard1-2/+15
2006-06-14MIPS FPU support (Marius Goeger)bellard1-3/+641
2006-05-22cosmetics (Thiemo Seufer)bellard1-1/+1
2006-04-23MIPS CP0 not usable in kernel mode (Stefan Weil)bellard1-1/+1
2005-12-05MIPS fixes (Daniel Jacobowitz)bellard1-43/+98
2005-11-26fixed BLTZAL and BLTZALL insns - fixed regressions from jmp optsbellard1-10/+21
2005-11-21cpu_exec_init() changebellard1-4/+1
2005-11-20use direct jump only for jumps in the same pagebellard1-15/+23
2005-10-30suppressed JUMP_TB (Paul Brook)bellard1-7/+40
2005-07-04correct split between helper.c and op_helper.c - cosmeticsbellard1-0/+168
2005-07-02report C0 status correctly (Ralf Baechle)bellard1-1/+11
2005-07-02fixed priviledgees for CP0 use (Ralf Baechle)bellard1-1/+4
2005-07-02unaligned load fix (Ralf Baechle)bellard1-0/+2