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AgeCommit message (Expand)AuthorFilesLines
2015-10-28target-*: Advance pc after recognizing a breakpointRichard Henderson1-0/+5
2015-10-22disas: QOMify lm32 specific disas setupPeter Crosthwaite1-0/+7
2015-10-09qdev: Protect device-list-properties against broken devicesMarkus Armbruster1-0/+7
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson1-38/+4
2015-10-07tcg: Pass data argument to restore_state_to_opcRichard Henderson1-2/+3
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson1-0/+3
2015-10-07target-*: Drop cpu_gen_code defineRichard Henderson1-1/+0
2015-10-07target-*: Introduce and use cpu_breakpoint_testRichard Henderson1-18/+7
2015-10-07target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson1-3/+2
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson1-4/+1
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson1-1/+1
2015-09-25lm32: Remove ELF_MACHINE from cpu.hPeter Crosthwaite1-2/+0
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt1-1/+1
2015-09-11maint: remove / fix many doubled wordsDaniel P. Berrange1-1/+1
2015-07-09cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite1-1/+1
2015-07-09cpu: Change cpu_exec_init() arg to cpu, not envPeter Crosthwaite1-1/+1
2015-07-09cpu: Add Error argument to cpu_exec_init()Bharata B Rao1-1/+1
2015-06-22disas: Remove uses of CPU envPeter Crosthwaite1-1/+1
2015-06-19semihosting: create SemihostingConfig structure and semihost.hLeon Alrae1-1/+2
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson1-11/+9
2015-03-10cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost1-8/+1
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson1-9/+5
2015-02-12tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson1-1/+1
2015-01-20exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell1-2/+0
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini1-1/+1
2015-01-03translate: check cflags instead of use_icount globalPaolo Bonzini1-4/+4
2014-10-06gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flagPeter Maydell1-0/+1
2014-09-25target-lm32: Use cpu_exec_interrupt qom hookRichard Henderson3-0/+15
2014-09-12cpu-exec: Make debug_excp_handler a QOM CPU methodPeter Maydell3-4/+5
2014-08-12trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova1-0/+3
2014-06-23vl: allow other threads to do qemu_system_vmstop_requestPaolo Bonzini1-1/+1
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini2-1/+2
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini1-10/+0
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson4-9/+4
2014-05-24lm32: remove lm32_sysMichael Walle1-10/+0
2014-05-24target-lm32: add semihosting supportMichael Walle5-2/+238
2014-05-14savevm: Remove all the unneeded version_minimum_id_old (rest)Juan Quintela1-4/+2
2014-03-13cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber1-3/+3
2014-03-13cputlb: Change tlb_flush() argument to CPUStateAndreas Färber1-1/+1
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cpu-exec: Change cpu_resume_from_signal() argument to CPUStateAndreas Färber1-1/+1
2014-03-13exec: Change cpu_breakpoint_{insert,remove{,_by_ref,_all}} argumentAndreas Färber1-2/+7
2014-03-13exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argumentAndreas Färber1-2/+5
2014-03-13translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber1-4/+1
2014-03-13cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber1-3/+3
2014-03-13exec: Change tlb_fill() argument to CPUStateAndreas Färber1-5/+8
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber4-5/+7
2014-03-13cpu: Move watchpoint fields from CPU_COMMON to CPUStateAndreas Färber2-4/+5
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2-8/+10
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber4-5/+9
generated by cgit v1.1 at 2024-11-01 17:54:07 +0000