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path: root/target-i386/translate.c
AgeCommit message (Expand)AuthorFilesLines
2013-10-10tcg: Move helper registration into tcg_context_initRichard Henderson1-4/+0
2013-09-12target-i386: Only provide CMOV and friends if feature bit setPeter Maydell1-0/+19
2013-09-02tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson1-1/+1
2013-07-23cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber1-2/+3
2013-07-09target-i386: Change gen_intermediate_code_internal() argument to X86CPUAndreas Färber1-4/+5
2013-05-31target-i386: Fix aflag logic for CODE64 and the 0x67 prefixRichard Henderson1-15/+15
2013-05-10target-i386: ROR r8/r16 imm instruction fixAurelien Jarno1-0/+1
2013-05-02target-i386: Replace cpuid_*features fields with a feature word arrayEduardo Habkost1-5/+5
2013-04-20i386 ROR r8/r16 instruction fixPavel Dovgaluk1-0/+1
2013-04-13target-i386: add AES-NI instructionsAurelien Jarno1-0/+7
2013-04-13target-i386: add pclmulqdq instructionAurelien Jarno1-0/+3
2013-04-01target-i386: SSE4.1: fix pinsrb instructionAurelien Jarno1-2/+2
2013-03-23target-i386: Fix flags computation for ADOXRichard Henderson1-1/+1
2013-03-22Fix typos and misspellingsPeter Maydell1-1/+1
2013-03-03gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell1-2/+2
2013-02-27target-i386: Use mulu2 and muls2Richard Henderson1-111/+56
2013-02-23target-i386: Use add2 to implement the ADX extensionRichard Henderson1-11/+9
2013-02-19target-i386: Use movcond to implement shiftd.Richard Henderson1-141/+106
2013-02-19target-i386: Discard CC_OP computation in set_cc_op alsoRichard Henderson1-3/+11
2013-02-19target-i386: Use movcond to implement rotate flags.Richard Henderson1-116/+121
2013-02-19target-i386: Use movcond to implement shift flags.Richard Henderson1-52/+42
2013-02-19target-i386: Add CC_OP_CLRRichard Henderson1-3/+14
2013-02-19target-i386: Implement tzcnt and fix lzcntRichard Henderson1-37/+49
2013-02-19target-i386: Implement ADX extensionRichard Henderson1-3/+106
2013-02-18target-i386: Implement RORXRichard Henderson1-0/+32
2013-02-18target-i386: Implement SHLX, SARX, SHRXRichard Henderson1-0/+31
2013-02-18target-i386: Implement PDEP, PEXTRichard Henderson1-0/+36
2013-02-18target-i386: Implement MULXRichard Henderson1-0/+39
2013-02-18target-i386: Implement BZHIRichard Henderson1-0/+27
2013-02-18target-i386: Implement BLSR, BLSMSK, BLSIRichard Henderson1-0/+48
2013-02-18target-i386: Implement BEXTRRichard Henderson1-0/+40
2013-02-18target-i386: Implement ANDNRichard Henderson1-2/+17
2013-02-18target-i386: Implement MOVBERichard Henderson1-25/+97
2013-02-18target-i386: Decode the VEX prefixesRichard Henderson1-4/+64
2013-02-18target-i386: Tidy prefix parsingRichard Henderson1-82/+52
2013-02-18target-i386: Use CC_SRC2 for ADC and SBBRichard Henderson1-49/+31
2013-02-18target-i386: Make helper_cc_compute_{all,c} constRichard Henderson1-4/+27
2013-02-18target-i386: optimize flags checking after sub using CC_SRCTRichard Henderson1-15/+31
2013-02-18target-i386: Update cc_op before TCG branchesRichard Henderson1-4/+4
2013-02-18target-i386: introduce gen_jcc1_noeobRichard Henderson1-5/+22
2013-02-18target-i386: use gen_op for cmps/scasRichard Henderson1-14/+6
2013-02-18target-i386: kill cpu_T3Paolo Bonzini1-11/+8
2013-02-18target-i386: expand cmov via movcondRichard Henderson1-25/+20
2013-02-18target-i386: introduce gen_cmovcc1Paolo Bonzini1-34/+38
2013-02-18target-i386: cleanup temporary macros for CCPreparePaolo Bonzini1-47/+39
2013-02-18target-i386: inline gen_prepare_cc_slowRichard Henderson1-45/+46
2013-02-18target-i386: use CCPrepare to generate conditional jumpsPaolo Bonzini1-110/+9
2013-02-18target-i386: introduce gen_prepare_ccRichard Henderson1-49/+42
2013-02-18target-i386: introduce CCPrepareRichard Henderson1-54/+93
2013-02-18target-i386: optimize setcc instructionsPaolo Bonzini1-58/+37
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