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2016-02-09tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson2-12/+12
2016-02-09tcg: Remove lingering references to gen_opc_bufRichard Henderson1-2/+1
2016-02-04Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160203'...Peter Maydell2-43/+60
2016-02-03target-arm: Don't report presence of EL2 if it doesn't existPeter Maydell1-0/+9
2016-02-03target-arm: Implement the S2 MMU inputsize > pamax checkEdgar E. Iglesias1-0/+8
2016-02-03target-arm: Rename check_s2_startlevel to check_s2_mmu_setupEdgar E. Iglesias1-6/+6
2016-02-03target-arm: Apply S2 MMU startlevel table size check to AArch64Edgar E. Iglesias1-8/+8
2016-02-03target-arm: Make various system registers visible to EL3Peter Maydell1-29/+29
2016-02-03log: do not unnecessarily include qom/cpu.hPaolo Bonzini2-0/+2
2016-01-29arm: Clean up includesPeter Maydell1-0/+1
2016-01-27gdb: provide the name of the architecture in the target.xmlDavid Hildenbrand2-0/+18
2016-01-21target-arm: Implement FPEXC32_EL2 system registerPeter Maydell1-0/+16
2016-01-21target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM modePeter Maydell1-1/+5
2016-01-21target-arm: Implement remaining illegal return event checksPeter Maydell1-0/+10
2016-01-21target-arm: Handle exception return from AArch64 to non-EL0 AArch32Peter Maydell1-21/+59
2016-01-21target-arm: Fix wrong AArch64 entry offset for EL2/EL3 targetPeter Maydell1-1/+20
2016-01-21target-arm: Pull semihosting handling out to arm_cpu_do_interrupt()Peter Maydell1-39/+81
2016-01-21target-arm: Use a single entry point for AArch64 and AArch32 exceptionsPeter Maydell3-36/+44
2016-01-21target-arm: Move aarch64_cpu_do_interrupt() to helper.cPeter Maydell3-105/+101
2016-01-21target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()Peter Maydell1-9/+24
2016-01-21target-arm: Support multiple address spaces in page table walksPeter Maydell2-2/+15
2016-01-21target-arm: Implement cpu_get_phys_page_attrs_debugPeter Maydell3-6/+8
2016-01-21target-arm: Implement asidx_from_attrsPeter Maydell2-0/+9
2016-01-21target-arm: Add QOM property for Secure memory regionPeter Maydell3-0/+41
2016-01-18target-arm: Clean up includesPeter Maydell19-31/+19
2016-01-15target-arm: dump-guest-memory: add vfp notes for armAndrew Jones1-3/+46
2016-01-15target-arm: dump-guest-memory: add prfpreg notes for aarch64Andrew Jones1-8/+71
2016-01-15target-arm: support QMP dump-guest-memoryAndrew Jones4-2/+238
2016-01-15target-arm: Use the right MMU index in arm_regime_using_lpae_formatAlvise Rigo3-7/+12
2016-01-13error: Strip trailing '\n' from error string arguments (again)Markus Armbruster2-3/+3
2015-12-17kvm: x86: add support for KVM_CAP_SPLIT_IRQCHIPPaolo Bonzini1-1/+7
2015-12-17target-arm: kvm - re-inject guest debug exceptionsAlex Bennée2-9/+27
2015-12-17target-arm: kvm - add support for HW assisted debugAlex Bennée4-22/+415
2015-12-17target-arm: kvm - support for single stepAlex Bennée1-0/+7
2015-12-17target-arm: kvm - implement software breakpointsAlex Bennée4-15/+123
2015-12-17target-arm: kvm64 - introduce kvm_arm_init_debug()Alex Bennée1-0/+18
2015-12-17target-arm: Fix and improve AA32 singlestep translation completion codeSergey Fedorov1-34/+31
2015-12-17target-arm: raise exception on misaligned LDREX operandsAndrew Baumann5-5/+62
2015-11-24target-arm/translate-a64.c: Correct unallocated checks for ldst_exclPeter Maydell1-13/+2
2015-11-24target-arm: Don't mask out bits [47:40] in LPAE descriptors for v8Peter Maydell1-1/+11
2015-11-19target-arm: Update condexec before arch BP check in AA32 translationSergey Fedorov1-0/+1
2015-11-19target-arm: Update condexec before CP access check in AA32 translationSergey Fedorov1-0/+1
2015-11-12target-arm: Update PC before calling gen_helper_check_breakpoints()Sergey Fedorov2-0/+2
2015-11-10target-arm: Clean up DISAS_UPDATE usage in AArch32 translation codeSergey Fedorov1-11/+14
2015-11-10target-arm: Fix gdb singlestep handling in arm_debug_excp_handler()Sergey Fedorov1-1/+7
2015-11-03target-arm: Report S/NS status in the CPU debug logsPeter Maydell2-2/+21
2015-11-03target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32Peter Maydell1-3/+5
2015-11-03target-arm: Add and use symbolic names for register banksSoren Brinkmann4-39/+56
2015-10-28target-*: Advance pc after recognizing a breakpointRichard Henderson2-4/+10
2015-10-27target-arm: Add support for S1 + S2 MMU translationsEdgar E. Iglesias2-7/+32