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2016-02-18target-arm: Add PMUSERENR_EL0 registerAlistair Francis1-0/+6
2016-02-18target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registersAlistair Francis1-0/+12
2016-02-18target-arm: Add the pmceid0 and pmceid1 registersAlistair Francis4-0/+22
2016-02-18target-arm: UNDEF in the UNPREDICTABLE SRS-from-System casePeter Maydell2-4/+13
2016-02-18target-arm: Combine user-only and softmmu get/set_r13_banked()Peter Maydell1-19/+0
2016-02-18target-arm: Move bank_number() into internals.hPeter Maydell2-26/+25
2016-02-18target-arm: Move get/set_r13_banked() to op_helper.cPeter Maydell2-33/+37
2016-02-18target-arm: Clean up trap/undef handling of SRSPeter Maydell1-5/+61
2016-02-18target-arm: Report correct syndrome for FPEXC32_EL2 trapsPeter Maydell3-2/+20
2016-02-18target-arm: Implement MDCR_EL3.TDA and MDCR_EL2.TDA trapsPeter Maydell1-9/+30
2016-02-18target-arm: Implement MDCR_EL2.TDRA trapsPeter Maydell1-3/+24
2016-02-18target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA trapsPeter Maydell2-1/+34
2016-02-18target-arm: Fix handling of SCR.SMDPeter Maydell1-5/+7
2016-02-18target-arm: correct CNTFRQ access rightsPeter Maydell2-3/+38
2016-02-11target-arm: Implement checking of fired watchpointSergey Fedorov3-14/+25
2016-02-11target-arm: Fix IL bit reported for Thumb VFP and Neon trapsPeter Maydell1-3/+3
2016-02-11target-arm: Fix IL bit reported for Thumb coprocessor trapsPeter Maydell1-4/+4
2016-02-11target-arm: Correct misleading 'is_thumb' syn_* parameter namesPeter Maydell1-14/+14
2016-02-11target-arm: Enable EL3 for Cortex-A53 and Cortex-A57Peter Maydell1-0/+2
2016-02-11target-arm: Implement NSACR trapping behaviourPeter Maydell1-4/+58
2016-02-11target-arm: Add isread parameter to CPAccessFnsPeter Maydell6-37/+68
2016-02-11target-arm: Update arm_generate_debug_exceptions() to handle EL2/EL3Peter Maydell1-5/+43
2016-02-11target-arm: Use access_trap_aa32s_el1() for SCR and MVBARPeter Maydell1-2/+4
2016-02-11target-arm: Implement MDCR_EL3 and SDCRPeter Maydell2-0/+27
2016-02-11target-arm: Fix typo in comment in arm_is_secure_below_el3()Peter Maydell1-1/+1
2016-02-09tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson2-12/+12
2016-02-09tcg: Remove lingering references to gen_opc_bufRichard Henderson1-2/+1
2016-02-04Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160203'...Peter Maydell2-43/+60
2016-02-03target-arm: Don't report presence of EL2 if it doesn't existPeter Maydell1-0/+9
2016-02-03target-arm: Implement the S2 MMU inputsize > pamax checkEdgar E. Iglesias1-0/+8
2016-02-03target-arm: Rename check_s2_startlevel to check_s2_mmu_setupEdgar E. Iglesias1-6/+6
2016-02-03target-arm: Apply S2 MMU startlevel table size check to AArch64Edgar E. Iglesias1-8/+8
2016-02-03target-arm: Make various system registers visible to EL3Peter Maydell1-29/+29
2016-02-03log: do not unnecessarily include qom/cpu.hPaolo Bonzini2-0/+2
2016-01-29arm: Clean up includesPeter Maydell1-0/+1
2016-01-27gdb: provide the name of the architecture in the target.xmlDavid Hildenbrand2-0/+18
2016-01-21target-arm: Implement FPEXC32_EL2 system registerPeter Maydell1-0/+16
2016-01-21target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM modePeter Maydell1-1/+5
2016-01-21target-arm: Implement remaining illegal return event checksPeter Maydell1-0/+10
2016-01-21target-arm: Handle exception return from AArch64 to non-EL0 AArch32Peter Maydell1-21/+59
2016-01-21target-arm: Fix wrong AArch64 entry offset for EL2/EL3 targetPeter Maydell1-1/+20
2016-01-21target-arm: Pull semihosting handling out to arm_cpu_do_interrupt()Peter Maydell1-39/+81
2016-01-21target-arm: Use a single entry point for AArch64 and AArch32 exceptionsPeter Maydell3-36/+44
2016-01-21target-arm: Move aarch64_cpu_do_interrupt() to helper.cPeter Maydell3-105/+101
2016-01-21target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()Peter Maydell1-9/+24
2016-01-21target-arm: Support multiple address spaces in page table walksPeter Maydell2-2/+15
2016-01-21target-arm: Implement cpu_get_phys_page_attrs_debugPeter Maydell3-6/+8
2016-01-21target-arm: Implement asidx_from_attrsPeter Maydell2-0/+9
2016-01-21target-arm: Add QOM property for Secure memory regionPeter Maydell3-0/+41
2016-01-18target-arm: Clean up includesPeter Maydell19-31/+19