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target-arm
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Files
Lines
2014-01-31
target-arm: Add set_neon_rmode helper
Will Newton
2
-0
/
+18
2014-01-31
target-arm: Add support for AArch32 SIMD VRINTX
Will Newton
1
-1
/
+10
2014-01-31
target-arm: Add support for AArch32 FP VRINTX
Will Newton
1
-0
/
+11
2014-01-31
target-arm: Add support for AArch32 FP VRINTZ
Will Newton
1
-0
/
+16
2014-01-31
target-arm: Add support for AArch32 FP VRINTR
Will Newton
1
-0
/
+11
2014-01-31
target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTM
Will Newton
1
-0
/
+54
2014-01-31
target-arm: Move arm_rmode_to_sf to a shared location.
Will Newton
3
-28
/
+30
2014-01-31
ARM: Convert MIDR to a property
Alistair Francis
1
-0
/
+1
2014-01-31
target-arm: A64: Add SIMD scalar copy instructions
Peter Maydell
1
-1
/
+42
2014-01-31
target-arm: A64: Add SIMD modified immediate group
Alex Bennée
1
-1
/
+119
2014-01-31
target-arm: A64: Add SIMD copy operations
Alex Bennée
1
-1
/
+209
2014-01-31
target-arm: A64: Add SIMD across-lanes instructions
Michael Matz
1
-1
/
+176
2014-01-31
target-arm: A64: Add SIMD ZIP/UZP/TRN
Michael Matz
1
-1
/
+75
2014-01-31
target-arm: A64: Add SIMD TBL/TBLX
Michael Matz
3
-1
/
+86
2014-01-31
target-arm: A64: Add SIMD EXT
Peter Maydell
1
-1
/
+78
2014-01-31
target-arm: A64: Add decode skeleton for SIMD data processing insns
Alex Bennée
1
-1
/
+305
2014-01-31
target-arm: A64: Add SIMD ld/st single
Peter Maydell
1
-2
/
+142
2014-01-31
target-arm: A64: Add SIMD ld/st multiple
Alex Bennée
1
-2
/
+248
2014-01-14
Merge remote branch 'luiz/queue/qmp' into qmpq
Edgar E. Iglesias
1
-5
/
+2
2014-01-14
target-arm: Switch ARMCPUInfo arrays to use terminator entries
Peter Maydell
2
-12
/
+12
2014-01-12
arm: fix compile on bigendian host
Alexey Kardashevskiy
1
-1
/
+1
2014-01-08
target-arm: A64: Add support for FCVT between half, single and double
Peter Maydell
3
-1
/
+96
2014-01-08
target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions
Peter Maydell
3
-1
/
+191
2014-01-08
target-arm: A64: Add floating-point<->integer conversion instructions
Will Newton
1
-3
/
+20
2014-01-08
target-arm: A64: Add floating-point<->fixed-point instructions
Alexander Graf
3
-1
/
+200
2014-01-08
target-arm: A64: Add extra VFP fixed point conversion helpers
Will Newton
2
-1
/
+26
2014-01-08
target-arm: Ignore most exceptions from scalbn when doing fixpoint conversion
Peter Maydell
1
-0
/
+9
2014-01-08
target-arm: Rename A32 VFP conversion helpers
Will Newton
3
-24
/
+35
2014-01-08
target-arm: Prepare VFP_CONV_FIX helpers for A64 uses
Will Newton
1
-14
/
+14
2014-01-08
target-arm: fix build with gcc 4.8.2
Michael S. Tsirkin
1
-0
/
+6
2014-01-08
target-arm: remove raw_read|write duplication
Peter Crosthwaite
1
-10
/
+2
2014-01-08
target-arm: use c13_context field for CONTEXTIDR
Sergey Fedorov
1
-1
/
+1
2014-01-08
target-arm: Give the FPSCR rounding modes names
Alexander Graf
2
-4
/
+13
2014-01-08
target-arm: A64: Add support for floating point cond select
Claudio Fontana
1
-1
/
+44
2014-01-08
target-arm: A64: Add support for floating point conditional compare
Claudio Fontana
1
-1
/
+34
2014-01-08
target-arm: A64: Add support for floating point compare
Claudio Fontana
3
-1
/
+113
2014-01-08
target-arm: A64: Add fmov (scalar, immediate) instruction
Alexander Graf
1
-1
/
+31
2014-01-08
target-arm: A64: Add "Floating-point data-processing (3 source)" insns
Alexander Graf
1
-1
/
+94
2014-01-08
target-arm: A64: Add "Floating-point data-processing (2 source)" insns
Alexander Graf
1
-1
/
+181
2014-01-08
target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum
Peter Maydell
4
-52
/
+20
2014-01-08
target-arm: A64: Fix vector register access on bigendian hosts
Peter Maydell
1
-34
/
+35
2014-01-08
target-arm: A64: Add support for dumping AArch64 VFP register state
Alexander Graf
1
-0
/
+16
2014-01-08
target-arm: A64: support for ld/st/cl exclusive
Michael Matz
1
-3
/
+153
2014-01-08
target-arm: Widen exclusive-access support struct fields to 64 bits
Peter Maydell
3
-36
/
+49
2014-01-08
target-arm: aarch64: add support for ld lit
Alexander Graf
1
-2
/
+45
2014-01-08
target-arm: A64: add support for conditional compare insns
Claudio Fontana
1
-13
/
+60
2014-01-08
target-arm: A64: add support for add/sub with carry
Claudio Fontana
1
-2
/
+103
2014-01-07
target-arm: Widen thread-local register state fields to 64 bits
Peter Maydell
2
-10
/
+30
2014-01-07
target-arm: A64: Implement minimal set of EL0-visible sysregs
Peter Maydell
3
-1
/
+115
2014-01-07
target-arm: A64: Implement MRS/MSR/SYS/SYSL
Peter Maydell
1
-30
/
+82
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