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path: root/target-arm/translate.h
AgeCommit message (Expand)AuthorFilesLines
2015-02-05target-arm: Define correct mmu_idx values and pass them in TB flagsPeter Maydell1-1/+2
2014-12-11target-arm: add non-secure Translation Block flagSergey Fedorov1-0/+1
2014-10-24target-arm: rename arm_current_pl to arm_current_elGreg Bellows1-2/+2
2014-10-24target-arm: Add support for A32 and T32 HVC and SMC insnsPeter Maydell1-0/+2
2014-09-29target-arm: Don't handle c15_cpar changes via tb_flush()Peter Maydell1-0/+2
2014-08-19target-arm: Implement ARMv8 single-step handling for A64 codePeter Maydell1-0/+12
2014-05-27target-arm: Use a 1:1 mapping between EL and MMU indexEdgar E. Iglesias1-5/+1
2014-05-27target-arm: Move get_mem_index to translate.hEdgar E. Iglesias1-0/+9
2014-04-17target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32Peter Maydell1-0/+8
2014-04-17target-arm: A64: Add assertion that FP access was checkedPeter Maydell1-0/+8
2014-04-17target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN setPeter Maydell1-1/+2
2014-04-17target-arm: Add support for generating exceptions with syndrome informationPeter Maydell1-0/+4
2014-03-17target-arm: A64: Implement PMULL instructionPeter Maydell1-0/+6
2014-03-10target-arm: Implement WFE as a yield operationPeter Maydell1-0/+2
2014-01-07target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoderPeter Maydell1-0/+2
2013-12-17target-arm: A64: add support for conditional branchesAlexander Graf1-0/+2
2013-12-17target-arm: A64: add support for B and BL insnsAlexander Graf1-0/+3
2013-12-17target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()Peter Maydell1-2/+18
2013-09-10target-arm: Add AArch64 translation stubAlexander Graf1-0/+19
2013-09-10target-arm: Prepare translation for AArch64 codeAlexander Graf1-0/+1
2013-09-10target-arm: Export cpu_envAlexander Graf1-0/+2
2013-09-10target-arm: Extract the disas struct to a header fileAlexander Graf1-0/+27
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