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path: root/target-arm/op_helper.c
AgeCommit message (Expand)AuthorFilesLines
2015-12-17target-arm: raise exception on misaligned LDREX operandsAndrew Baumann1-1/+39
2015-11-10target-arm: Fix gdb singlestep handling in arm_debug_excp_handler()Sergey Fedorov1-1/+7
2015-11-03target-arm: Add and use symbolic names for register banksSoren Brinkmann1-4/+4
2015-10-27target-arm: Add support for S1 + S2 MMU translationsEdgar E. Iglesias1-0/+1
2015-10-27target-arm: Route S2 MMU faults to EL2Edgar E. Iglesias1-2/+8
2015-10-27target-arm: Add S2 translation to 64bit S1 PTWsEdgar E. Iglesias1-2/+2
2015-10-27target-arm: Add ARMMMUFaultInfoEdgar E. Iglesias1-1/+2
2015-10-16target-arm: Fix CPU breakpoint handlingSergey Fedorov1-11/+18
2015-10-16target-arm: Fix GDB breakpoint handlingSergey Fedorov1-0/+6
2015-08-25target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3Peter Maydell1-0/+8
2015-07-06target-arm: Split DISAS_YIELD from DISAS_WFEPeter Maydell1-3/+15
2015-06-15arm: Refactor get_phys_addr FSR return mechanismPeter Crosthwaite1-5/+6
2015-06-02target-arm: Correct check for non-EL3Edgar E. Iglesias1-1/+1
2015-05-29target-arm: Add WFx instruction trap supportGreg Bellows1-1/+59
2015-05-29target-arm: Don't halt on WFI unless we don't have any workPeter Maydell1-0/+7
2015-05-29target-arm: Allow cp access functions to indicate traps to EL2 or EL3Peter Maydell1-1/+14
2015-05-29target-arm: Make raise_exception() take syndrome and target ELPeter Maydell1-40/+28
2015-05-29target-arm: Set exception target EL in tlb_fillPeter Maydell1-0/+1
2015-05-29target-arm: Move setting of exception info into tlb_fillPeter Maydell1-2/+25
2015-05-29target-arm: Set correct syndrome for faults on MSR DAIF*, immPeter Maydell1-0/+3
2015-05-29target-arm: Extend helpers to route exceptionsGreg Bellows1-0/+21
2015-05-29target-arm: Add exception target el infrastructureGreg Bellows1-1/+2
2015-04-26target-arm: Check watchpoints against CPU security statePeter Maydell1-2/+4
2015-04-26target-arm: Use attribute info to handle user-only watchpointsPeter Maydell1-11/+12
2015-02-13target-arm: Add 32/64-bit register syncGreg Bellows1-4/+2
2014-12-11target-arm: make c13 cp regs banked (FCSEIDR, ...)Fabian Aggeler1-1/+1
2014-12-11target-arm: add SCTLR_EL3 and make SCTLR bankedFabian Aggeler1-1/+1
2014-10-24target-arm: A32: Emulate the SMC instructionFabian Aggeler1-2/+1
2014-10-24target-arm: rename arm_current_pl to arm_current_elGreg Bellows1-8/+8
2014-10-24target-arm: add emulation of PSCI calls for system emulationRob Herring1-0/+16
2014-10-24target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpersPeter Maydell1-7/+10
2014-09-29target-arm: A64: Emulate the SMC insnEdgar E. Iglesias1-0/+26
2014-09-29target-arm: A64: Emulate the HVC insnEdgar E. Iglesias1-0/+31
2014-09-29target-arm: Don't handle c15_cpar changes via tb_flush()Peter Maydell1-0/+11
2014-09-29target-arm: Implement handling of breakpoint firingPeter Maydell1-15/+60
2014-09-12target-arm: Implement handling of fired watchpointsPeter Maydell1-0/+188
2014-08-19target-arm: Implement ARMv8 single-step handling for A64 codePeter Maydell1-0/+5
2014-08-19target-arm: Set PSTATE.SS correctly on exception return from AArch64Peter Maydell1-0/+20
2014-08-19target-arm: Don't allow AArch32 to access RES0 CPSR bitsPeter Maydell1-1/+1
2014-08-04target-arm: A64: Respect SPSEL in ERET SP restoreEdgar E. Iglesias1-1/+1
2014-08-04target-arm: A64: Break out aarch64_save/restore_spEdgar E. Iglesias1-5/+1
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini1-2/+1
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini1-14/+0
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-1/+1
2014-05-27target-arm: A64: Generalize ERET to various ELsEdgar E. Iglesias1-5/+6
2014-05-27target-arm: A64: Forbid ERET to higher or unimplemented ELsEdgar E. Iglesias1-2/+6
2014-05-27target-arm: A64: Introduce aarch64_banked_spsr_index()Edgar E. Iglesias1-1/+2
2014-05-27target-arm: Make elr_el1 an arrayEdgar E. Iglesias1-3/+3
2014-05-01target-arm: Correct a comment refering to EL0Edgar E. Iglesias1-1/+1
2014-04-17target-arm: Implement AArch64 EL1 exception handlingRob Herring1-0/+60
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