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path: root/target-arm/op_helper.c
AgeCommit message (Expand)AuthorFilesLines
2015-04-26target-arm: Check watchpoints against CPU security statePeter Maydell1-2/+4
2015-04-26target-arm: Use attribute info to handle user-only watchpointsPeter Maydell1-11/+12
2015-02-13target-arm: Add 32/64-bit register syncGreg Bellows1-4/+2
2014-12-11target-arm: make c13 cp regs banked (FCSEIDR, ...)Fabian Aggeler1-1/+1
2014-12-11target-arm: add SCTLR_EL3 and make SCTLR bankedFabian Aggeler1-1/+1
2014-10-24target-arm: A32: Emulate the SMC instructionFabian Aggeler1-2/+1
2014-10-24target-arm: rename arm_current_pl to arm_current_elGreg Bellows1-8/+8
2014-10-24target-arm: add emulation of PSCI calls for system emulationRob Herring1-0/+16
2014-10-24target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpersPeter Maydell1-7/+10
2014-09-29target-arm: A64: Emulate the SMC insnEdgar E. Iglesias1-0/+26
2014-09-29target-arm: A64: Emulate the HVC insnEdgar E. Iglesias1-0/+31
2014-09-29target-arm: Don't handle c15_cpar changes via tb_flush()Peter Maydell1-0/+11
2014-09-29target-arm: Implement handling of breakpoint firingPeter Maydell1-15/+60
2014-09-12target-arm: Implement handling of fired watchpointsPeter Maydell1-0/+188
2014-08-19target-arm: Implement ARMv8 single-step handling for A64 codePeter Maydell1-0/+5
2014-08-19target-arm: Set PSTATE.SS correctly on exception return from AArch64Peter Maydell1-0/+20
2014-08-19target-arm: Don't allow AArch32 to access RES0 CPSR bitsPeter Maydell1-1/+1
2014-08-04target-arm: A64: Respect SPSEL in ERET SP restoreEdgar E. Iglesias1-1/+1
2014-08-04target-arm: A64: Break out aarch64_save/restore_spEdgar E. Iglesias1-5/+1
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini1-2/+1
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini1-14/+0
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-1/+1
2014-05-27target-arm: A64: Generalize ERET to various ELsEdgar E. Iglesias1-5/+6
2014-05-27target-arm: A64: Forbid ERET to higher or unimplemented ELsEdgar E. Iglesias1-2/+6
2014-05-27target-arm: A64: Introduce aarch64_banked_spsr_index()Edgar E. Iglesias1-1/+2
2014-05-27target-arm: Make elr_el1 an arrayEdgar E. Iglesias1-3/+3
2014-05-01target-arm: Correct a comment refering to EL0Edgar E. Iglesias1-1/+1
2014-04-17target-arm: Implement AArch64 EL1 exception handlingRob Herring1-0/+60
2014-04-17target-arm: Implement SP_EL0, SP_EL1Peter Maydell1-1/+1
2014-04-17target-arm: Add support for generating exceptions with syndrome informationPeter Maydell1-1/+20
2014-04-17target-arm: Provide correct syndrome information for cpreg access trapsPeter Maydell1-4/+4
2014-04-17target-arm: Split out private-to-target functions into internals.hPeter Maydell1-0/+1
2014-03-13translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber1-4/+4
2014-03-13exec: Change tlb_fill() argument to CPUStateAndreas Färber1-5/+7
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber1-6/+14
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber1-1/+2
2014-03-10target-arm: Implement WFE as a yield operationPeter Maydell1-0/+9
2014-02-26target-arm: A64: Implement MSR (immediate) instructionsPeter Maydell1-0/+25
2014-02-20target-arm: Drop success/fail return from cpreg read and write functionsPeter Maydell1-20/+8
2014-02-20target-arm: Split cpreg access checks out from read/write functionsPeter Maydell1-0/+18
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-1/+3
2013-02-23target-arm: Implement sbc_cc inlineRichard Henderson1-15/+0
2013-02-23target-arm: Implement adc_cc inlineRichard Henderson1-15/+0
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-5/+5
2012-12-16exec: refactor cpu_restore_stateBlue Swirl1-7/+1
2012-10-24target-arm: Remove out of date FIXME regarding saturating arithmeticPeter Maydell1-2/+0
2012-10-05target-arm: convert sar, shl and shr helpers to TCGAurelien Jarno1-24/+0
2012-10-05target-arm: convert add_cc and sub_cc helpers to TCGAurelien Jarno1-20/+0
2012-09-15target-arm: final conversion to AREG0 free modeBlue Swirl1-7/+1
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