Age | Commit message (Expand) | Author | Files | Lines |
2015-01-26 | vmstate: accept QEMUTimer in VMSTATE_TIMER*, add VMSTATE_TIMER_PTR* | Paolo Bonzini | 1 | -2/+2 |
2014-12-11 | target-arm: Support save/load for 64 bit CPUs | Peter Maydell | 1 | -3/+19 |
2014-10-24 | target-arm: increase arrays of registers R13 & R14 | Fabian Aggeler | 1 | -2/+2 |
2014-10-24 | target-arm: add powered off cpu state | Rob Herring | 1 | -2/+3 |
2014-09-29 | target-arm: Implement setting guest breakpoints | Peter Maydell | 1 | -0/+1 |
2014-09-12 | target-arm: Implement setting of watchpoints | Peter Maydell | 1 | -0/+3 |
2014-05-27 | target-arm: Add SPSR entries for EL2/HYP and EL3/MON | Edgar E. Iglesias | 1 | -3/+3 |
2014-05-27 | target-arm: A64: Add ELR entries for EL2 and 3 | Edgar E. Iglesias | 1 | -3/+3 |
2014-05-27 | target-arm: A64: Add SP entries for EL2 and 3 | Edgar E. Iglesias | 1 | -3/+3 |
2014-05-27 | target-arm: Make elr_el1 an array | Edgar E. Iglesias | 1 | -1/+1 |
2014-05-13 | savevm: Remove all the unneeded version_minimum_id_old (arm) | Juan Quintela | 1 | -5/+0 |
2014-05-05 | vmstate: s/VMSTATE_INT32_LE/VMSTATE_INT32_POSITIVE_LE/ | Michael S. Tsirkin | 1 | -1/+1 |
2014-04-17 | target-arm: Implement AArch64 SPSR_EL1 | Peter Maydell | 1 | -4/+4 |
2014-04-17 | target-arm: Implement SP_EL0, SP_EL1 | Peter Maydell | 1 | -3/+4 |
2014-04-17 | target-arm: Add AArch64 ELR_EL1 register. | Peter Maydell | 1 | -3/+4 |
2014-04-17 | target-arm: Define exception record for AArch64 exceptions | Peter Maydell | 1 | -0/+3 |
2014-03-27 | target-arm: Add missing 'static' attribute | Stefan Weil | 1 | -1/+1 |
2014-01-08 | target-arm: Widen exclusive-access support struct fields to 64 bits | Peter Maydell | 1 | -6/+6 |
2013-09-10 | target-arm: Prepare translation for AArch64 code | Alexander Graf | 1 | -4/+4 |
2013-08-20 | target-arm: Implement the generic timer | Peter Maydell | 1 | -3/+5 |
2013-06-25 | target-arm: Initialize cpreg list from KVM when using KVM | Peter Maydell | 1 | -5/+25 |
2013-06-25 | target-arm: Convert TCG to using (index,value) list for cp migration | Peter Maydell | 1 | -47/+67 |
2013-04-19 | target-arm: Correctly restore FPSCR | Peter Maydell | 1 | -7/+41 |
2013-04-19 | target-arm: Add some missing CPU state fields to VMState | Peter Maydell | 1 | -3/+10 |
2013-04-19 | target-arm: port ARM CPU save/load to use VMState | Juan Quintela | 1 | -213/+174 |
2012-07-12 | target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAE | Peter Maydell | 1 | -0/+6 |
2012-07-12 | target-arm: Extend feature flags to 64 bits | Peter Maydell | 1 | -2/+2 |
2012-06-20 | target-arm: Remove c0_cachetype CPUARMState field | Peter Maydell | 1 | -2/+0 |
2012-01-13 | arm: Add dummy support for co-processor 15's secure config register | Rob Herring | 1 | -0/+2 |
2012-01-05 | arm: add dummy A9-specific cp15 registers | Mark Langsdorf | 1 | -0/+6 |
2011-10-19 | target-arm/machine.c: Restore VFP registers correctly | Dmitry Koshelev | 1 | -1/+1 |
2011-06-22 | target-arm: Minimal implementation of performance counters | Peter Maydell | 1 | -0/+12 |
2011-03-06 | target-arm: Implement cp15 VA->PA translation | Adam Lackorzynski | 1 | -0/+2 |
2009-07-31 | Save/restore ARMv6 MMU state | Paul Brook | 1 | -1/+21 |
2009-05-21 | Convert machine registration to use module init functions | Anthony Liguori | 1 | -25/+0 |
2009-05-14 | Syborg (Symbian Virtual Platform) board | Paul Brook | 1 | -0/+1 |
2008-12-15 | ARM: basic SX1-cellphone sysemu support (Jean-Christophe PLAGNIOL-VILLARD). | balrog | 1 | -0/+2 |
2008-12-13 | Remove unnecessary trailing newlines | blueswir1 | 1 | -2/+0 |
2008-06-30 | Move CPU save/load registration to common code. | pbrook | 1 | -1/+1 |
2008-06-02 | Provide basic emulation for Sharp SL-6000 PDA (Tosa), Dmitry Baryshkov. | balrog | 1 | -0/+1 |
2008-05-18 | Add N810 to allowed -M values, add documentation part for N8x0. | balrog | 1 | -0/+1 |
2008-05-04 | remove target ifdefs from vl.c | aurel32 | 1 | -0/+213 |