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path: root/target-arm/helper.c
AgeCommit message (Expand)AuthorFilesLines
2012-10-24target-arm: Implement abs_i32 inline rather than as a helperPeter Maydell1-5/+0
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-14/+14
2012-09-15target-arm: final conversion to AREG0 free modeBlue Swirl1-4/+5
2012-09-10target-arm: Fix potential buffer overflowStefan Weil1-2/+2
2012-08-10target-arm: Fix typos in commentsPeter Maydell1-3/+3
2012-07-12target-arm: Add support for long format translation table walksPeter Maydell1-0/+182
2012-07-12target-arm: Implement TTBCR changes for LPAEPeter Maydell1-1/+14
2012-07-12target-arm: Implement long-descriptor PAR formatPeter Maydell1-10/+69
2012-07-12target-arm: Use target_phys_addr_t in get_phys_addr()Peter Maydell1-14/+15
2012-07-12target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAEPeter Maydell1-1/+76
2012-07-12target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAEPeter Maydell1-0/+5
2012-07-12target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registersPeter Maydell1-0/+16
2012-07-12target-arm: Implement privileged-execute-never (PXN)Peter Maydell1-12/+20
2012-07-12target-arm: Fix some copy-and-paste errors in cp register namesPeter Maydell1-3/+3
2012-07-12target-arm: Fix typo that meant TTBR1 accesses went to TTBR0Peter Maydell1-1/+1
2012-06-20target-arm: Remove remaining old cp15 infrastructurePeter Maydell1-39/+0
2012-06-20target-arm: Move block cache ops to new cp15 frameworkPeter Maydell1-0/+13
2012-06-20target-arm: Convert final ID registersPeter Maydell1-48/+68
2012-06-20target-arm: Convert MPIDRPeter Maydell1-22/+28
2012-06-20target-arm: Convert cp15 cache ID registersPeter Maydell1-28/+33
2012-06-20target-arm: Convert cp15 crn=0 crm={1,2} feature registersPeter Maydell1-8/+54
2012-06-20target-arm: Convert cp15 crn=1 registersPeter Maydell1-75/+54
2012-06-20target-arm: Convert cp15 crn=9 registersPeter Maydell1-79/+25
2012-06-20target-arm: Convert cp15 crn=6 registersPeter Maydell1-53/+35
2012-06-20target-arm: convert cp15 crn=7 registersPeter Maydell1-11/+52
2012-06-20target-arm: Convert cp15 VA-PA translation registersPeter Maydell1-43/+65
2012-06-20target-arm: Convert cp15 MMU TLB controlPeter Maydell1-20/+43
2012-06-20target-arm: Convert cp15 crn=15 registersPeter Maydell1-115/+87
2012-06-20target-arm: Convert cp15 crn=10 registersPeter Maydell1-6/+5
2012-06-20target-arm: Convert cp15 crn=13 registersPeter Maydell1-30/+31
2012-06-20target-arm: Convert cp15 crn=2 registersPeter Maydell1-55/+33
2012-06-20target-arm: Convert MMU fault status cp15 registersPeter Maydell1-81/+107
2012-06-20target-arm: Convert cp15 c3 registerPeter Maydell1-6/+12
2012-06-20target-arm: Convert generic timer cp15 regsPeter Maydell1-12/+11
2012-06-20target-arm: Convert performance monitor registersPeter Maydell1-120/+157
2012-06-20target-arm: Convert TLS registersPeter Maydell1-0/+19
2012-06-20target-arm: Convert WFI/barriers special cases to cp_reginfoPeter Maydell1-0/+42
2012-06-20target-arm: Convert TEECR, TEEHBR to new schemePeter Maydell1-9/+45
2012-06-20target-arm: Convert debug registers to cp_reginfoPeter Maydell1-0/+25
2012-06-20target-arm: Add register_cp_regs_for_features()Peter Maydell1-0/+11
2012-06-20target-arm: Remove old cpu_arm_set_cp_io infrastructurePeter Maydell1-54/+0
2012-06-20target-arm: initial coprocessor register frameworkPeter Maydell1-0/+101
2012-06-04Kill off cpu_state_reset()Andreas Färber1-5/+0
2012-06-04target-arm: Use cpu_reset() in cpu_arm_init()Andreas Färber1-1/+1
2012-04-27target-arm: Change cpu_arm_init() return type to ARMCPUAndreas Färber1-2/+2
2012-04-21target-arm: Move reset handling to arm_cpu_resetPeter Maydell1-96/+1
2012-04-21target-arm: Drop cpu_reset_model_id()Peter Maydell1-58/+1
2012-04-21target-arm: Move cache ID register setup to cpu specific init fnsPeter Maydell1-11/+2
2012-04-21target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_resetPeter Maydell1-2/+1
2012-04-21target-arm: Move feature register setup to per-CPU init fnsPeter Maydell1-59/+14