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path: root/target-arm/cpu.c
AgeCommit message (Expand)AuthorFilesLines
2013-12-10target-arm: Don't hardcode KVM target CPU to be A15Peter Maydell1-0/+2
2013-12-10target-arm: Allow secondary KVM CPUs to be booted via PSCIPeter Maydell1-0/+7
2013-12-10target-arm: Add ARMCPU field for Linux device-tree 'compatible' stringPeter Maydell1-0/+50
2013-09-10target-arm: Prepare translation for AArch64 codeAlexander Graf1-0/+8
2013-09-10target-arm: Disable 32 bit CPUs in 64 bit linux-user buildsPeter Maydell1-2/+7
2013-09-10target-arm: fix ARMv7M stack alignment on resetSebastian Ottlik1-1/+1
2013-09-10target-arm: Make '-cpu any' available in linux-user mode onlyPeter Maydell1-0/+4
2013-08-22aio / timers: Switch entire codebase to the new timer APIAlex Bligh1-2/+2
2013-08-20target-arm: Implement the generic timerPeter Maydell1-0/+7
2013-08-20target-arm: Make IRQ and FIQ gpio lines on the CPU objectPeter Maydell1-0/+60
2013-07-29cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"Andreas Färber1-1/+3
2013-07-27cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XMLAndreas Färber1-0/+1
2013-07-27cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber1-0/+2
2013-07-26cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber1-0/+1
2013-07-23cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber1-1/+4
2013-07-23cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()Andreas Färber1-0/+8
2013-07-15target-arm: add feature flag for ARMv8Mans Rullgard1-1/+6
2013-07-09cpu: Move reset logging to CPUStateAndreas Färber1-5/+0
2013-07-09log: Change log_cpu_state[_mask]() argument to CPUStateAndreas Färber1-1/+1
2013-06-28cpu: Change qemu_init_vcpu() argument to CPUStateAndreas Färber1-1/+0
2013-06-28cpu: Turn cpu_dump_{state,statistics}() into CPUState hooksAndreas Färber1-0/+1
2013-06-25target-arm: Make LPAE feature imply V7MPPeter Maydell1-1/+1
2013-06-25target-arm: Convert TCG to using (index,value) list for cp migrationPeter Maydell1-0/+2
2013-04-19target-arm: port ARM CPU save/load to use VMStateJuan Quintela1-0/+1
2013-03-12target-arm: Override do_interrupt for ARMv7-M profileAndreas Färber1-1/+13
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-0/+1
2013-02-16cpu: Add CPUArchState pointer to CPUStateAndreas Färber1-0/+2
2013-02-16target-arm: Move TCG initialization to ARMCPU initfnAndreas Färber1-0/+6
2013-02-16target-arm: Update ARMCPU to QOM realizefnAndreas Färber1-7/+14
2013-01-30target-arm: Rename CPU typesAndreas Färber1-2/+6
2013-01-27target-arm: Catch attempt to instantiate abstract type in cpu_init()Andreas Färber1-1/+2
2013-01-27target-arm: Detect attempt to instantiate non-CPU type in cpu_init()Andreas Färber1-0/+17
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber1-1/+1
2013-01-11target-arm: use type_register() instead of type_register_static()Eduardo Habkost1-1/+1
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini1-1/+1
2012-07-12target-arm: Extend feature flags to 64 bitsPeter Maydell1-1/+1
2012-07-12target-arm: Implement privileged-execute-never (PXN)Peter Maydell1-0/+4
2012-06-20target-arm: Remove ARM_CPUID_* macrosPeter Maydell1-25/+25
2012-06-20target-arm: Convert final ID registersPeter Maydell1-2/+0
2012-06-20target-arm: Convert MPIDRPeter Maydell1-0/+2
2012-06-20target-arm: Convert cp15 cache ID registersPeter Maydell1-2/+0
2012-06-20target-arm: Convert cp15 crn=0 crm={1,2} feature registersPeter Maydell1-14/+0
2012-06-20target-arm: Convert cp15 crn=1 registersPeter Maydell1-1/+6
2012-06-20target-arm: Convert cp15 crn=9 registersPeter Maydell1-0/+34
2012-06-20target-arm: Convert cp15 crn=6 registersPeter Maydell1-0/+10
2012-06-20target-arm: convert cp15 crn=7 registersPeter Maydell1-0/+19
2012-06-20target-arm: Convert cp15 crn=15 registersPeter Maydell1-2/+38
2012-06-20target-arm: Convert cp15 crn=2 registersPeter Maydell1-1/+0
2012-06-20target-arm: Convert performance monitor registersPeter Maydell1-4/+0
2012-06-20target-arm: Add register_cp_regs_for_features()Peter Maydell1-0/+2
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